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tcg: Remove TCG_TARGET_HAS_{br,set}cond2 from riscv and loongarch64

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These defines never should have been added as they were
never used.  Only 32-bit hosts may have these opcodes and
they have them unconditionally.

Fixes: 6cb14e4de2 ("tcg/loongarch64: Add the tcg-target.h file")
Fixes: fb1f70f368 ("tcg/riscv: Add the tcg-target.h file")
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-10 15:01:43 -08:00
parent 175aa36668
commit e726f65867
2 changed files with 0 additions and 4 deletions
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2
tcg/loongarch64/tcg-target-has.h
View file

@ -37,8 +37,6 @@
#define TCG_TARGET_HAS_clz_i32 1 #define TCG_TARGET_HAS_clz_i32 1
#define TCG_TARGET_HAS_ctz_i32 1 #define TCG_TARGET_HAS_ctz_i32 1
#define TCG_TARGET_HAS_ctpop_i32 0 #define TCG_TARGET_HAS_ctpop_i32 0
#define TCG_TARGET_HAS_brcond2 0
#define TCG_TARGET_HAS_setcond2 0
#define TCG_TARGET_HAS_qemu_st8_i32 0 #define TCG_TARGET_HAS_qemu_st8_i32 0
/* 64-bit operations */ /* 64-bit operations */

2
tcg/riscv/tcg-target-has.h
View file

@ -37,8 +37,6 @@
#define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB)
#define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB)
#define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB)
#define TCG_TARGET_HAS_brcond2 1
#define TCG_TARGET_HAS_setcond2 1
#define TCG_TARGET_HAS_qemu_st8_i32 0 #define TCG_TARGET_HAS_qemu_st8_i32 0
#define TCG_TARGET_HAS_negsetcond_i64 1 #define TCG_TARGET_HAS_negsetcond_i64 1