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target/arm: Implement SVE2 XAR

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In addition, use the same vector generator interface for AdvSIMD.
This fixes a bug in which the AdvSIMD insn failed to clear the
high bits of the SVE register.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-44-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2021-05-24 18:03:09 -07:00 • committed by Peter Maydell
parent 7d47ac94a7
commit e6eba6e532
8 changed files with 172 additions and 21 deletions
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39
target/arm/sve_helper.c
View file

@ -7202,3 +7202,42 @@ void HELPER(sve2_histseg)(void *vd, void *vn, void *vm, uint32_t desc)
*(uint64_t *)(vd + i + 8) = out1;
}
}
void HELPER(sve2_xar_b)(void *vd, void *vn, void *vm, uint32_t desc)
{
intptr_t i, opr_sz = simd_oprsz(desc) / 8;
int shr = simd_data(desc);
int shl = 8 - shr;
uint64_t mask = dup_const(MO_8, 0xff >> shr);
uint64_t *d = vd, *n = vn, *m = vm;
for (i = 0; i < opr_sz; ++i) {
uint64_t t = n[i] ^ m[i];
d[i] = ((t >> shr) & mask) | ((t << shl) & ~mask);
}
}
void HELPER(sve2_xar_h)(void *vd, void *vn, void *vm, uint32_t desc)
{
intptr_t i, opr_sz = simd_oprsz(desc) / 8;
int shr = simd_data(desc);
int shl = 16 - shr;
uint64_t mask = dup_const(MO_16, 0xffff >> shr);
uint64_t *d = vd, *n = vn, *m = vm;
for (i = 0; i < opr_sz; ++i) {
uint64_t t = n[i] ^ m[i];
d[i] = ((t >> shr) & mask) | ((t << shl) & ~mask);
}
}
void HELPER(sve2_xar_s)(void *vd, void *vn, void *vm, uint32_t desc)
{
intptr_t i, opr_sz = simd_oprsz(desc) / 4;
int shr = simd_data(desc);
uint32_t *d = vd, *n = vn, *m = vm;
for (i = 0; i < opr_sz; ++i) {
d[i] = ror32(n[i] ^ m[i], shr);
}
}