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target-xtensa: implement instruction breakpoints

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Add IBREAKA/IBREAKENABLE SRs and implement debug exception, BREAK and
BREAK.N instructions and IBREAK breakpoints.

IBREAK breakpoint address is considered constant for TB lifetime.
On IBREAKA/IBREAKENABLE change corresponding TBs are invalidated.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2012-01-13 09:21:32 +04:00
parent ab58c5b4fd
commit e61dc8f72c
5 changed files with 119 additions and 3 deletions
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38
target-xtensa/op_helper.c
View file

@ -134,6 +134,19 @@ void HELPER(exception_cause_vaddr)(uint32_t pc, uint32_t cause, uint32_t vaddr)
HELPER(exception_cause)(pc, cause);
}
void HELPER(debug_exception)(uint32_t pc, uint32_t cause)
{
unsigned level = env->config->debug_level;
env->pc = pc;
env->sregs[DEBUGCAUSE] = cause;
env->sregs[EPC1 + level - 1] = pc;
env->sregs[EPS2 + level - 2] = env->sregs[PS];
env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM |
(level << PS_INTLEVEL_SHIFT);
HELPER(exception)(EXC_DEBUG);
}
uint32_t HELPER(nsa)(uint32_t v)
{
if (v & 0x80000000) {
@ -662,3 +675,28 @@ void HELPER(wtlb)(uint32_t p, uint32_t v, uint32_t dtlb)
split_tlb_entry_spec(v, dtlb, &vpn, &wi, &ei);
xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, p);
}
void HELPER(wsr_ibreakenable)(uint32_t v)
{
uint32_t change = v ^ env->sregs[IBREAKENABLE];
unsigned i;
for (i = 0; i < env->config->nibreak; ++i) {
if (change & (1 << i)) {
tb_invalidate_phys_page_range(
env->sregs[IBREAKA + i], env->sregs[IBREAKA + i] + 1, 0);
}
}
env->sregs[IBREAKENABLE] = v & ((1 << env->config->nibreak) - 1);
}
void HELPER(wsr_ibreaka)(uint32_t i, uint32_t v)
{
if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) {
tb_invalidate_phys_page_range(
env->sregs[IBREAKA + i], env->sregs[IBREAKA + i] + 1, 0);
tb_invalidate_phys_page_range(v, v + 1, 0);
}
env->sregs[IBREAKA + i] = v;
}