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hw/isa/piix3: Create IDE controller in host device
The IDE controller is an integral part of PIIX3 (function 1). So create it as part of the south bridge. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231007123843.127151-12-shentey@gmail.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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5 changed files with 18 additions and 8 deletions
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@ -43,7 +43,6 @@
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#include "net/net.h"
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#include "hw/ide/isa.h"
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#include "hw/ide/pci.h"
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#include "hw/ide/piix.h"
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#include "hw/irq.h"
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#include "sysemu/kvm.h"
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#include "hw/i386/kvm/clock.h"
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@ -290,6 +289,10 @@ static void pc_init1(MachineState *machine,
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isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
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rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
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"rtc"));
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dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
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pci_ide_create_devs(PCI_DEVICE(dev));
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idebus[0] = qdev_get_child_bus(dev, "ide.0");
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idebus[1] = qdev_get_child_bus(dev, "ide.1");
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} else {
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isa_bus = isa_bus_new(NULL, system_memory, system_io,
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&error_abort);
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@ -301,6 +304,8 @@ static void pc_init1(MachineState *machine,
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i8257_dma_init(isa_bus, 0);
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pcms->hpet_enabled = false;
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idebus[0] = NULL;
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idebus[1] = NULL;
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}
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if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
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@ -329,12 +334,6 @@ static void pc_init1(MachineState *machine,
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pc_nic_init(pcmc, isa_bus, pci_bus);
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if (pcmc->pci_enabled) {
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PCIDevice *dev;
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dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE);
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pci_ide_create_devs(dev);
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idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
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idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
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pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
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}
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#ifdef CONFIG_IDE_ISA
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