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vfio/igd: use VFIOConfigMirrorQuirk for mirrored registers
With the introduction of config_offset field, VFIOConfigMirrorQuirk can
now be used for those mirrored register in igd bar0. This eliminates
the need for the macro intoduced in 1a2623b5c9
("vfio/igd: add macro
for declaring mirrored registers").
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
Link: https://lore.kernel.org/r/20250104154219.7209-4-tomitamoeko@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
parent
f36e7ba975
commit
e45891e0b1
1 changed files with 31 additions and 94 deletions
125
hw/vfio/igd.c
125
hw/vfio/igd.c
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@ -18,6 +18,7 @@
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#include "hw/hw.h"
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#include "hw/nvram/fw_cfg.h"
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#include "pci.h"
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#include "pci-quirks.h"
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#include "trace.h"
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/*
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@ -422,83 +423,13 @@ static const MemoryRegionOps vfio_igd_index_quirk = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static uint64_t vfio_igd_pci_config_read(VFIOPCIDevice *vdev, uint64_t offset,
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unsigned size)
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{
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switch (size) {
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case 1:
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return pci_get_byte(vdev->pdev.config + offset);
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case 2:
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return pci_get_word(vdev->pdev.config + offset);
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case 4:
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return pci_get_long(vdev->pdev.config + offset);
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case 8:
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return pci_get_quad(vdev->pdev.config + offset);
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default:
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hw_error("igd: unsupported pci config read at %"PRIx64", size %u",
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offset, size);
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break;
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}
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return 0;
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}
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static void vfio_igd_pci_config_write(VFIOPCIDevice *vdev, uint64_t offset,
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uint64_t data, unsigned size)
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{
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switch (size) {
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case 1:
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pci_set_byte(vdev->pdev.config + offset, data);
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break;
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case 2:
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pci_set_word(vdev->pdev.config + offset, data);
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break;
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case 4:
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pci_set_long(vdev->pdev.config + offset, data);
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break;
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case 8:
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pci_set_quad(vdev->pdev.config + offset, data);
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break;
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default:
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hw_error("igd: unsupported pci config write at %"PRIx64", size %u",
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offset, size);
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break;
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}
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}
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#define VFIO_IGD_QUIRK_MIRROR_REG(reg, name) \
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static uint64_t vfio_igd_quirk_read_##name(void *opaque, \
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hwaddr addr, unsigned size) \
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{ \
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VFIOPCIDevice *vdev = opaque; \
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\
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return vfio_igd_pci_config_read(vdev, reg + addr, size); \
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} \
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\
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static void vfio_igd_quirk_write_##name(void *opaque, hwaddr addr, \
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uint64_t data, unsigned size) \
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{ \
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VFIOPCIDevice *vdev = opaque; \
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\
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vfio_igd_pci_config_write(vdev, reg + addr, data, size); \
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} \
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\
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static const MemoryRegionOps vfio_igd_quirk_mirror_##name = { \
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.read = vfio_igd_quirk_read_##name, \
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.write = vfio_igd_quirk_write_##name, \
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.endianness = DEVICE_LITTLE_ENDIAN, \
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};
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VFIO_IGD_QUIRK_MIRROR_REG(IGD_GMCH, ggc)
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VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM, bdsm)
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VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm64)
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#define IGD_GGC_MMIO_OFFSET 0x108040
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#define IGD_BDSM_MMIO_OFFSET 0x1080C0
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void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr)
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{
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VFIOQuirk *quirk;
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VFIOQuirk *ggc_quirk, *bdsm_quirk;
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VFIOConfigMirrorQuirk *ggc_mirror, *bdsm_mirror;
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int gen;
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/*
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@ -522,33 +453,39 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr)
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return;
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}
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quirk = vfio_quirk_alloc(2);
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quirk->data = vdev;
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ggc_quirk = vfio_quirk_alloc(1);
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ggc_mirror = ggc_quirk->data = g_malloc0(sizeof(*ggc_mirror));
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ggc_mirror->mem = ggc_quirk->mem;
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ggc_mirror->vdev = vdev;
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ggc_mirror->bar = nr;
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ggc_mirror->offset = IGD_GGC_MMIO_OFFSET;
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ggc_mirror->config_offset = IGD_GMCH;
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memory_region_init_io(&quirk->mem[0], OBJECT(vdev),
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&vfio_igd_quirk_mirror_ggc, vdev,
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memory_region_init_io(ggc_mirror->mem, OBJECT(vdev),
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&vfio_generic_mirror_quirk, ggc_mirror,
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"vfio-igd-ggc-quirk", 2);
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memory_region_add_subregion_overlap(vdev->bars[0].region.mem,
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IGD_GGC_MMIO_OFFSET, &quirk->mem[0],
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memory_region_add_subregion_overlap(vdev->bars[nr].region.mem,
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ggc_mirror->offset, ggc_mirror->mem,
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1);
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if (gen < 11) {
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memory_region_init_io(&quirk->mem[1], OBJECT(vdev),
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&vfio_igd_quirk_mirror_bdsm, vdev,
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"vfio-igd-bdsm-quirk", 4);
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memory_region_add_subregion_overlap(vdev->bars[0].region.mem,
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IGD_BDSM_MMIO_OFFSET,
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&quirk->mem[1], 1);
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} else {
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memory_region_init_io(&quirk->mem[1], OBJECT(vdev),
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&vfio_igd_quirk_mirror_bdsm64, vdev,
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"vfio-igd-bdsm-quirk", 8);
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memory_region_add_subregion_overlap(vdev->bars[0].region.mem,
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IGD_BDSM_MMIO_OFFSET,
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&quirk->mem[1], 1);
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}
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QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, ggc_quirk, next);
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QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next);
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bdsm_quirk = vfio_quirk_alloc(1);
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bdsm_mirror = bdsm_quirk->data = g_malloc0(sizeof(*bdsm_mirror));
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bdsm_mirror->mem = bdsm_quirk->mem;
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bdsm_mirror->vdev = vdev;
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bdsm_mirror->bar = nr;
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bdsm_mirror->offset = IGD_BDSM_MMIO_OFFSET;
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bdsm_mirror->config_offset = (gen < 11) ? IGD_BDSM : IGD_BDSM_GEN11;
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memory_region_init_io(bdsm_mirror->mem, OBJECT(vdev),
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&vfio_generic_mirror_quirk, bdsm_mirror,
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"vfio-igd-bdsm-quirk", (gen < 11) ? 4 : 8);
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memory_region_add_subregion_overlap(vdev->bars[nr].region.mem,
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bdsm_mirror->offset, bdsm_mirror->mem,
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1);
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QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, bdsm_quirk, next);
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}
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void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
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