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hw/riscv: Configurable MPFS CLINT timebase freq
This property enables the setting of the CLINT timebase frequency through the command line, for example: -machine microchip-icicle-kit,clint-timebase-frequency=10000000 Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250319061342.26435-6-sebastian.huber@embedded-brains.de> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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2 changed files with 46 additions and 4 deletions
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@ -39,6 +39,7 @@
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#include "qemu/units.h"
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#include "qemu/cutils.h"
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "hw/sysbus.h"
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@ -61,9 +62,6 @@
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#define BIOS_FILENAME "hss.bin"
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#define RESET_VECTOR 0x20220000
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/* CLINT timebase frequency */
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#define CLINT_TIMEBASE_FREQ 1000000
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/* GEM version */
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#define GEM_REVISION 0x0107010c
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@ -193,6 +191,7 @@ static void microchip_pfsoc_soc_instance_init(Object *obj)
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static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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MicrochipIcicleKitState *iks = MICROCHIP_ICICLE_KIT_MACHINE(ms);
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MicrochipPFSoCState *s = MICROCHIP_PFSOC(dev);
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const MemMapEntry *memmap = microchip_pfsoc_memmap;
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MemoryRegion *system_memory = get_system_memory();
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@ -253,7 +252,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
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memmap[MICROCHIP_PFSOC_CLINT].base + RISCV_ACLINT_SWI_SIZE,
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RISCV_ACLINT_DEFAULT_MTIMER_SIZE, 0, ms->smp.cpus,
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RISCV_ACLINT_DEFAULT_MTIMECMP, RISCV_ACLINT_DEFAULT_MTIME,
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CLINT_TIMEBASE_FREQ, false);
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iks->clint_timebase_freq, false);
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/* L2 cache controller */
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create_unimplemented_device("microchip.pfsoc.l2cc",
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@ -671,6 +670,40 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
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}
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}
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static void microchip_icicle_kit_set_clint_timebase_freq(Object *obj,
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Visitor *v,
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const char *name,
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void *opaque,
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Error **errp)
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{
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MicrochipIcicleKitState *s = MICROCHIP_ICICLE_KIT_MACHINE(obj);
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uint32_t value;
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if (!visit_type_uint32(v, name, &value, errp)) {
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return;
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}
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s->clint_timebase_freq = value;
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}
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static void microchip_icicle_kit_get_clint_timebase_freq(Object *obj,
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Visitor *v,
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const char *name,
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void *opaque,
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Error **errp)
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{
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MicrochipIcicleKitState *s = MICROCHIP_ICICLE_KIT_MACHINE(obj);
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uint32_t value = s->clint_timebase_freq;
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visit_type_uint32(v, name, &value, errp);
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}
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static void microchip_icicle_kit_machine_instance_init(Object *obj)
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{
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MicrochipIcicleKitState *m = MICROCHIP_ICICLE_KIT_MACHINE(obj);
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m->clint_timebase_freq = 1000000;
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}
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static void microchip_icicle_kit_machine_class_init(ObjectClass *oc,
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const void *data)
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{
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@ -693,12 +726,20 @@ static void microchip_icicle_kit_machine_class_init(ObjectClass *oc,
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* See memory_tests() in mss_ddr.c in the HSS source code.
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*/
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mc->default_ram_size = 1537 * MiB;
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object_class_property_add(oc, "clint-timebase-frequency", "uint32_t",
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microchip_icicle_kit_get_clint_timebase_freq,
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microchip_icicle_kit_set_clint_timebase_freq,
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NULL, NULL);
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object_class_property_set_description(oc, "clint-timebase-frequency",
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"Set CLINT timebase frequency in Hz.");
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}
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static const TypeInfo microchip_icicle_kit_machine_typeinfo = {
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.name = MACHINE_TYPE_NAME("microchip-icicle-kit"),
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.parent = TYPE_MACHINE,
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.class_init = microchip_icicle_kit_machine_class_init,
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.instance_init = microchip_icicle_kit_machine_instance_init,
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.instance_size = sizeof(MicrochipIcicleKitState),
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};
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@ -67,6 +67,7 @@ typedef struct MicrochipIcicleKitState {
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MachineState parent_obj;
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/*< public >*/
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uint32_t clint_timebase_freq;
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MicrochipPFSoCState soc;
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} MicrochipIcicleKitState;
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