motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-12-17 21:26:13 -07:00
Code Issues Projects Releases Packages Wiki Activity Actions

bcm2835_ic: add bcm2835 interrupt controller

Browse source 
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Andrew Baumann 2016-01-29 14:50:39 -08:00 • committed by Peter Maydell
parent 04f1ab15b9
commit e3ece3e34d
3 changed files with 270 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

33
include/hw/intc/bcm2835_ic.h Normal file
View file

@ -0,0 +1,33 @@
/*
* Raspberry Pi emulation (c) 2012 Gregory Estrade
* This code is licensed under the GNU GPLv2 and later.
*/
#ifndef BCM2835_IC_H
#define BCM2835_IC_H
#include "hw/sysbus.h"
#define TYPE_BCM2835_IC "bcm2835-ic"
#define BCM2835_IC(obj) OBJECT_CHECK(BCM2835ICState, (obj), TYPE_BCM2835_IC)
#define BCM2835_IC_GPU_IRQ "gpu-irq"
#define BCM2835_IC_ARM_IRQ "arm-irq"
typedef struct BCM2835ICState {
/*< private >*/
SysBusDevice busdev;
/*< public >*/
MemoryRegion iomem;
qemu_irq irq;
qemu_irq fiq;
/* 64 GPU IRQs + 8 ARM IRQs = 72 total (GPU first) */
uint64_t gpu_irq_level, gpu_irq_enable;
uint8_t arm_irq_level, arm_irq_enable;
bool fiq_enable;
uint8_t fiq_select;
} BCM2835ICState;
#endif