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hw: Use device_class_set_legacy_reset() instead of opencoding

Browse source 
Use device_class_set_legacy_reset() instead of opencoding an
assignment to DeviceClass::reset. This change was produced
with:
 spatch --macro-file scripts/cocci-macro-file.h \
    --sp-file scripts/coccinelle/device-reset.cocci \
    --keep-comments --smpl-spacing --in-place --dir hw

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240830145812.1967042-8-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-09-13 15:31:44 +01:00
parent 134e0944f4
commit e3d0814368
410 changed files with 448 additions and 448 deletions
Download patch file Download diff file Expand all files Collapse all files

4
hw/ppc/pnv_psi.c
View file

@ -897,7 +897,7 @@ static void pnv_psi_power9_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV PSI Controller POWER9";
dc->realize = pnv_psi_power9_realize;
dc->reset = pnv_psi_power9_reset;
device_class_set_legacy_reset(dc, pnv_psi_power9_reset);
ppc->xscom_pcba = PNV9_XSCOM_PSIHB_BASE;
ppc->xscom_size = PNV9_XSCOM_PSIHB_SIZE;
@ -949,7 +949,7 @@ static void pnv_psi_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV PSI Controller";
device_class_set_props(dc, pnv_psi_properties);
dc->reset = pnv_psi_reset;
device_class_set_legacy_reset(dc, pnv_psi_reset);
dc->user_creatable = false;
}

2
hw/ppc/ppc405_boards.c
View file

@ -457,7 +457,7 @@ static void ref405ep_fpga_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ref405ep_fpga_realize;
dc->reset = ref405ep_fpga_reset;
device_class_set_legacy_reset(dc, ref405ep_fpga_reset);
/* Reason: only works as part of a ppc405 board */
dc->user_creatable = false;
}

12
hw/ppc/ppc405_uc.c
View file

@ -119,7 +119,7 @@ static void ppc405_pob_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_pob_realize;
dc->reset = ppc405_pob_reset;
device_class_set_legacy_reset(dc, ppc405_pob_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@ -196,7 +196,7 @@ static void ppc405_opba_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_opba_realize;
dc->reset = ppc405_opba_reset;
device_class_set_legacy_reset(dc, ppc405_opba_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@ -302,7 +302,7 @@ static void ppc405_dma_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_dma_realize;
dc->reset = ppc405_dma_reset;
device_class_set_legacy_reset(dc, ppc405_dma_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@ -492,7 +492,7 @@ static void ppc405_ocm_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_ocm_realize;
dc->reset = ppc405_ocm_reset;
device_class_set_legacy_reset(dc, ppc405_ocm_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@ -726,7 +726,7 @@ static void ppc405_gpt_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_gpt_realize;
dc->reset = ppc405_gpt_reset;
device_class_set_legacy_reset(dc, ppc405_gpt_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@ -975,7 +975,7 @@ static void ppc405_cpc_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_cpc_realize;
dc->reset = ppc405_cpc_reset;
device_class_set_legacy_reset(dc, ppc405_cpc_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc405_cpc_properties);

6
hw/ppc/ppc4xx_devs.c
View file

@ -242,7 +242,7 @@ static void ppc4xx_mal_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc4xx_mal_realize;
dc->reset = ppc4xx_mal_reset;
device_class_set_legacy_reset(dc, ppc4xx_mal_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc4xx_mal_properties);
@ -332,7 +332,7 @@ static void ppc405_plb_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_plb_realize;
dc->reset = ppc405_plb_reset;
device_class_set_legacy_reset(dc, ppc405_plb_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@ -518,7 +518,7 @@ static void ppc405_ebc_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_ebc_realize;
dc->reset = ppc405_ebc_reset;
device_class_set_legacy_reset(dc, ppc405_ebc_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}

4
hw/ppc/ppc4xx_sdram.c
View file

@ -437,7 +437,7 @@ static void ppc4xx_sdram_ddr_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc4xx_sdram_ddr_realize;
dc->reset = ppc4xx_sdram_ddr_reset;
device_class_set_legacy_reset(dc, ppc4xx_sdram_ddr_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc4xx_sdram_ddr_props);
@ -722,7 +722,7 @@ static void ppc4xx_sdram_ddr2_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc4xx_sdram_ddr2_realize;
dc->reset = ppc4xx_sdram_ddr2_reset;
device_class_set_legacy_reset(dc, ppc4xx_sdram_ddr2_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc4xx_sdram_ddr2_props);

2
hw/ppc/ppce500_spin.c
View file

@ -191,7 +191,7 @@ static void ppce500_spin_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->reset = spin_reset;
device_class_set_legacy_reset(dc, spin_reset);
}
static const TypeInfo ppce500_spin_info = {

2
hw/ppc/spapr_cpu_core.c
View file

@ -378,7 +378,7 @@ static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
dc->realize = spapr_cpu_core_realize;
dc->unrealize = spapr_cpu_core_unrealize;
dc->reset = spapr_cpu_core_reset;
device_class_set_legacy_reset(dc, spapr_cpu_core_reset);
device_class_set_props(dc, spapr_cpu_core_properties);
scc->cpu_type = data;
}

2
hw/ppc/spapr_iommu.c
View file

@ -672,7 +672,7 @@ static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = spapr_tce_table_realize;
dc->reset = spapr_tce_reset;
device_class_set_legacy_reset(dc, spapr_tce_reset);
dc->unrealize = spapr_tce_table_unrealize;
/* Reason: This is just an internal device for handling the hypercalls */
dc->user_creatable = false;

2
hw/ppc/spapr_pci.c
View file

@ -2248,7 +2248,7 @@ static void spapr_phb_class_init(ObjectClass *klass, void *data)
dc->realize = spapr_phb_realize;
dc->unrealize = spapr_phb_unrealize;
device_class_set_props(dc, spapr_phb_properties);
dc->reset = spapr_phb_reset;
device_class_set_legacy_reset(dc, spapr_phb_reset);
dc->vmsd = &vmstate_spapr_pci;
/* Supported by TYPE_SPAPR_MACHINE */
dc->user_creatable = true;

2
hw/ppc/spapr_vio.c
View file

@ -635,7 +635,7 @@ static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
{
DeviceClass *k = DEVICE_CLASS(klass);
k->realize = spapr_vio_busdev_realize;
k->reset = spapr_vio_busdev_reset;
device_class_set_legacy_reset(k, spapr_vio_busdev_reset);
k->bus_type = TYPE_SPAPR_VIO_BUS;
}