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hw/nvme: add support for zoned random write area
Add support for TP 4076 ("Zoned Random Write Area"), v2021.08.23
("Ratified").
This adds three new namespace parameters: "zoned.numzrwa" (number of
zrwa resources, i.e. number of zones that can have a zrwa),
"zoned.zrwas" (zrwa size in LBAs), "zoned.zrwafg" (granularity in LBAs
for flushes).
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
This commit is contained in:
Klaus Jensen
parent
25872031e1
commit
e321b4cdc2
5 changed files with 237 additions and 20 deletions
171
hw/nvme/ctrl.c
171
hw/nvme/ctrl.c
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@ -299,26 +299,37 @@ static void nvme_assign_zone_state(NvmeNamespace *ns, NvmeZone *zone,
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}
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}
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/*
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* Check if we can open a zone without exceeding open/active limits.
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* AOR stands for "Active and Open Resources" (see TP 4053 section 2.5).
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*/
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static int nvme_aor_check(NvmeNamespace *ns, uint32_t act, uint32_t opn)
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static uint16_t nvme_zns_check_resources(NvmeNamespace *ns, uint32_t act,
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uint32_t opn, uint32_t zrwa)
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{
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if (ns->params.max_active_zones != 0 &&
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ns->nr_active_zones + act > ns->params.max_active_zones) {
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trace_pci_nvme_err_insuff_active_res(ns->params.max_active_zones);
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return NVME_ZONE_TOO_MANY_ACTIVE | NVME_DNR;
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}
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if (ns->params.max_open_zones != 0 &&
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ns->nr_open_zones + opn > ns->params.max_open_zones) {
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trace_pci_nvme_err_insuff_open_res(ns->params.max_open_zones);
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return NVME_ZONE_TOO_MANY_OPEN | NVME_DNR;
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}
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if (zrwa > ns->zns.numzrwa) {
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return NVME_NOZRWA | NVME_DNR;
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}
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return NVME_SUCCESS;
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}
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/*
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* Check if we can open a zone without exceeding open/active limits.
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* AOR stands for "Active and Open Resources" (see TP 4053 section 2.5).
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*/
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static uint16_t nvme_aor_check(NvmeNamespace *ns, uint32_t act, uint32_t opn)
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{
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return nvme_zns_check_resources(ns, act, opn, 0);
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}
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static bool nvme_addr_is_cmb(NvmeCtrl *n, hwaddr addr)
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{
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hwaddr hi, lo;
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@ -1628,9 +1639,19 @@ static uint16_t nvme_check_zone_write(NvmeNamespace *ns, NvmeZone *zone,
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return status;
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}
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if (unlikely(slba != zone->w_ptr)) {
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trace_pci_nvme_err_write_not_at_wp(slba, zone->d.zslba, zone->w_ptr);
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return NVME_ZONE_INVALID_WRITE;
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if (zone->d.za & NVME_ZA_ZRWA_VALID) {
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uint64_t ezrwa = zone->w_ptr + 2 * ns->zns.zrwas;
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if (slba < zone->w_ptr || slba + nlb > ezrwa) {
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trace_pci_nvme_err_zone_invalid_write(slba, zone->w_ptr);
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return NVME_ZONE_INVALID_WRITE;
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}
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} else {
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if (unlikely(slba != zone->w_ptr)) {
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trace_pci_nvme_err_write_not_at_wp(slba, zone->d.zslba,
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zone->w_ptr);
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return NVME_ZONE_INVALID_WRITE;
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}
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}
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if (unlikely((slba + nlb) > zcap)) {
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@ -1710,6 +1731,14 @@ static uint16_t nvme_zrm_finish(NvmeNamespace *ns, NvmeZone *zone)
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/* fallthrough */
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case NVME_ZONE_STATE_CLOSED:
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nvme_aor_dec_active(ns);
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if (zone->d.za & NVME_ZA_ZRWA_VALID) {
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zone->d.za &= ~NVME_ZA_ZRWA_VALID;
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if (ns->params.numzrwa) {
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ns->zns.numzrwa++;
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}
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}
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/* fallthrough */
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case NVME_ZONE_STATE_EMPTY:
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nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_FULL);
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@ -1745,6 +1774,13 @@ static uint16_t nvme_zrm_reset(NvmeNamespace *ns, NvmeZone *zone)
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/* fallthrough */
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case NVME_ZONE_STATE_CLOSED:
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nvme_aor_dec_active(ns);
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if (zone->d.za & NVME_ZA_ZRWA_VALID) {
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if (ns->params.numzrwa) {
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ns->zns.numzrwa++;
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}
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}
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/* fallthrough */
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case NVME_ZONE_STATE_FULL:
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zone->w_ptr = zone->d.zslba;
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@ -1778,6 +1814,7 @@ static void nvme_zrm_auto_transition_zone(NvmeNamespace *ns)
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enum {
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NVME_ZRM_AUTO = 1 << 0,
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NVME_ZRM_ZRWA = 1 << 1,
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};
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static uint16_t nvme_zrm_open_flags(NvmeCtrl *n, NvmeNamespace *ns,
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@ -1796,7 +1833,8 @@ static uint16_t nvme_zrm_open_flags(NvmeCtrl *n, NvmeNamespace *ns,
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if (n->params.auto_transition_zones) {
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nvme_zrm_auto_transition_zone(ns);
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}
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status = nvme_aor_check(ns, act, 1);
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status = nvme_zns_check_resources(ns, act, 1,
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(flags & NVME_ZRM_ZRWA) ? 1 : 0);
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if (status) {
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return status;
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}
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@ -1824,6 +1862,12 @@ static uint16_t nvme_zrm_open_flags(NvmeCtrl *n, NvmeNamespace *ns,
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/* fallthrough */
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case NVME_ZONE_STATE_EXPLICITLY_OPEN:
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if (flags & NVME_ZRM_ZRWA) {
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ns->zns.numzrwa--;
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zone->d.za |= NVME_ZA_ZRWA_VALID;
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}
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return NVME_SUCCESS;
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default:
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@ -1837,12 +1881,6 @@ static inline uint16_t nvme_zrm_auto(NvmeCtrl *n, NvmeNamespace *ns,
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return nvme_zrm_open_flags(n, ns, zone, NVME_ZRM_AUTO);
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}
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static inline uint16_t nvme_zrm_open(NvmeCtrl *n, NvmeNamespace *ns,
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NvmeZone *zone)
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{
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return nvme_zrm_open_flags(n, ns, zone, 0);
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}
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static void nvme_advance_zone_wp(NvmeNamespace *ns, NvmeZone *zone,
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uint32_t nlb)
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{
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@ -1853,6 +1891,20 @@ static void nvme_advance_zone_wp(NvmeNamespace *ns, NvmeZone *zone,
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}
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}
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static void nvme_zoned_zrwa_implicit_flush(NvmeNamespace *ns, NvmeZone *zone,
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uint32_t nlbc)
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{
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uint16_t nzrwafgs = DIV_ROUND_UP(nlbc, ns->zns.zrwafg);
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nlbc = nzrwafgs * ns->zns.zrwafg;
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trace_pci_nvme_zoned_zrwa_implicit_flush(zone->d.zslba, nlbc);
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zone->w_ptr += nlbc;
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nvme_advance_zone_wp(ns, zone, nlbc);
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}
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static void nvme_finalize_zoned_write(NvmeNamespace *ns, NvmeRequest *req)
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{
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NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
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@ -1865,6 +1917,17 @@ static void nvme_finalize_zoned_write(NvmeNamespace *ns, NvmeRequest *req)
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zone = nvme_get_zone_by_slba(ns, slba);
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assert(zone);
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if (zone->d.za & NVME_ZA_ZRWA_VALID) {
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uint64_t ezrwa = zone->w_ptr + ns->zns.zrwas - 1;
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uint64_t elba = slba + nlb - 1;
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if (elba > ezrwa) {
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nvme_zoned_zrwa_implicit_flush(ns, zone, elba - ezrwa);
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}
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return;
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}
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nvme_advance_zone_wp(ns, zone, nlb);
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}
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@ -2665,7 +2728,9 @@ static void nvme_copy_in_completed_cb(void *opaque, int ret)
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goto invalid;
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}
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iocb->zone->w_ptr += nlb;
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if (!(iocb->zone->d.za & NVME_ZA_ZRWA_VALID)) {
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iocb->zone->w_ptr += nlb;
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}
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}
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qemu_iovec_reset(&iocb->iov);
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@ -3204,6 +3269,10 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool append,
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if (append) {
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bool piremap = !!(ctrl & NVME_RW_PIREMAP);
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if (unlikely(zone->d.za & NVME_ZA_ZRWA_VALID)) {
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return NVME_INVALID_ZONE_OP | NVME_DNR;
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}
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if (unlikely(slba != zone->d.zslba)) {
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trace_pci_nvme_err_append_not_at_start(slba, zone->d.zslba);
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status = NVME_INVALID_FIELD;
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@ -3255,7 +3324,9 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeRequest *req, bool append,
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goto invalid;
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}
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zone->w_ptr += nlb;
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if (!(zone->d.za & NVME_ZA_ZRWA_VALID)) {
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zone->w_ptr += nlb;
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}
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}
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data_offset = nvme_l2b(ns, slba);
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@ -3339,7 +3410,24 @@ enum NvmeZoneProcessingMask {
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static uint16_t nvme_open_zone(NvmeNamespace *ns, NvmeZone *zone,
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NvmeZoneState state, NvmeRequest *req)
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{
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return nvme_zrm_open(nvme_ctrl(req), ns, zone);
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NvmeZoneSendCmd *cmd = (NvmeZoneSendCmd *)&req->cmd;
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int flags = 0;
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if (cmd->zsflags & NVME_ZSFLAG_ZRWA_ALLOC) {
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uint16_t ozcs = le16_to_cpu(ns->id_ns_zoned->ozcs);
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if (!(ozcs & NVME_ID_NS_ZONED_OZCS_ZRWASUP)) {
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return NVME_INVALID_ZONE_OP | NVME_DNR;
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}
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if (zone->w_ptr % ns->zns.zrwafg) {
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return NVME_NOZRWA | NVME_DNR;
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}
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flags = NVME_ZRM_ZRWA;
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}
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return nvme_zrm_open_flags(nvme_ctrl(req), ns, zone, flags);
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}
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static uint16_t nvme_close_zone(NvmeNamespace *ns, NvmeZone *zone,
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@ -3614,6 +3702,44 @@ done:
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}
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}
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static uint16_t nvme_zone_mgmt_send_zrwa_flush(NvmeCtrl *n, NvmeZone *zone,
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uint64_t elba, NvmeRequest *req)
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{
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NvmeNamespace *ns = req->ns;
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uint16_t ozcs = le16_to_cpu(ns->id_ns_zoned->ozcs);
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uint64_t wp = zone->d.wp;
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uint32_t nlb = elba - wp + 1;
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uint16_t status;
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if (!(ozcs & NVME_ID_NS_ZONED_OZCS_ZRWASUP)) {
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return NVME_INVALID_ZONE_OP | NVME_DNR;
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}
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if (!(zone->d.za & NVME_ZA_ZRWA_VALID)) {
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return NVME_INVALID_FIELD | NVME_DNR;
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}
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if (elba < wp || elba > wp + ns->zns.zrwas) {
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return NVME_ZONE_BOUNDARY_ERROR | NVME_DNR;
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}
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if (nlb % ns->zns.zrwafg) {
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return NVME_INVALID_FIELD | NVME_DNR;
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}
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status = nvme_zrm_auto(n, ns, zone);
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if (status) {
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return status;
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}
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zone->w_ptr += nlb;
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nvme_advance_zone_wp(ns, zone, nlb);
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return NVME_SUCCESS;
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}
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static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req)
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{
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NvmeZoneSendCmd *cmd = (NvmeZoneSendCmd *)&req->cmd;
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@ -3640,7 +3766,7 @@ static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req)
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}
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zone = &ns->zone_array[zone_idx];
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if (slba != zone->d.zslba) {
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if (slba != zone->d.zslba && action != NVME_ZONE_ACTION_ZRWA_FLUSH) {
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trace_pci_nvme_err_unaligned_zone_cmd(action, slba, zone->d.zslba);
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return NVME_INVALID_FIELD | NVME_DNR;
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}
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@ -3716,6 +3842,13 @@ static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req)
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}
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break;
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case NVME_ZONE_ACTION_ZRWA_FLUSH:
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if (all) {
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return NVME_INVALID_FIELD | NVME_DNR;
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}
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return nvme_zone_mgmt_send_zrwa_flush(n, zone, slba, req);
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default:
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trace_pci_nvme_err_invalid_mgmt_action(action);
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status = NVME_INVALID_FIELD;
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