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https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 17:53:56 -06:00
Remove unneeded type casts
cpu_physical_memory_read, cpu_physical_memory_write take any pointer as 2nd argument without needing a type cast. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
parent
fd1ca7e0d5
commit
e1fe50dcb3
16 changed files with 37 additions and 38 deletions
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@ -56,7 +56,7 @@ static uint32_t bitband_readw(void *opaque, hwaddr offset)
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addr = bitband_addr(opaque, offset) & ~1;
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mask = (1 << ((offset >> 2) & 15));
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mask = tswap16(mask);
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cpu_physical_memory_read(addr, (uint8_t *)&v, 2);
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cpu_physical_memory_read(addr, &v, 2);
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return (v & mask) != 0;
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}
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@ -69,12 +69,12 @@ static void bitband_writew(void *opaque, hwaddr offset,
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addr = bitband_addr(opaque, offset) & ~1;
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mask = (1 << ((offset >> 2) & 15));
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mask = tswap16(mask);
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cpu_physical_memory_read(addr, (uint8_t *)&v, 2);
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cpu_physical_memory_read(addr, &v, 2);
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if (value & 1)
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v |= mask;
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else
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v &= ~mask;
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cpu_physical_memory_write(addr, (uint8_t *)&v, 2);
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cpu_physical_memory_write(addr, &v, 2);
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}
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static uint32_t bitband_readl(void *opaque, hwaddr offset)
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@ -85,7 +85,7 @@ static uint32_t bitband_readl(void *opaque, hwaddr offset)
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addr = bitband_addr(opaque, offset) & ~3;
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mask = (1 << ((offset >> 2) & 31));
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mask = tswap32(mask);
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cpu_physical_memory_read(addr, (uint8_t *)&v, 4);
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cpu_physical_memory_read(addr, &v, 4);
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return (v & mask) != 0;
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}
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@ -98,12 +98,12 @@ static void bitband_writel(void *opaque, hwaddr offset,
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addr = bitband_addr(opaque, offset) & ~3;
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mask = (1 << ((offset >> 2) & 31));
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mask = tswap32(mask);
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cpu_physical_memory_read(addr, (uint8_t *)&v, 4);
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cpu_physical_memory_read(addr, &v, 4);
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if (value & 1)
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v |= mask;
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else
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v &= ~mask;
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cpu_physical_memory_write(addr, (uint8_t *)&v, 4);
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cpu_physical_memory_write(addr, &v, 4);
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}
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static const MemoryRegionOps bitband_ops = {
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@ -128,7 +128,7 @@ static void set_kernel_args(const struct arm_boot_info *info)
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int cmdline_size;
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cmdline_size = strlen(info->kernel_cmdline);
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cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
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cpu_physical_memory_write(p + 8, info->kernel_cmdline,
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cmdline_size + 1);
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cmdline_size = (cmdline_size >> 2) + 1;
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WRITE_WORD(p, cmdline_size + 2);
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@ -219,7 +219,7 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
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}
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s = info->kernel_cmdline;
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if (s) {
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cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
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cpu_physical_memory_write(p, s, strlen(s) + 1);
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} else {
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WRITE_WORD(p, 0);
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}
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@ -170,12 +170,12 @@ static void eth_rx_desc_put(uint32_t addr, mv88w8618_rx_desc *desc)
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cpu_to_le16s(&desc->buffer_size);
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cpu_to_le32s(&desc->buffer);
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cpu_to_le32s(&desc->next);
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cpu_physical_memory_write(addr, (void *)desc, sizeof(*desc));
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cpu_physical_memory_write(addr, desc, sizeof(*desc));
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}
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static void eth_rx_desc_get(uint32_t addr, mv88w8618_rx_desc *desc)
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{
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cpu_physical_memory_read(addr, (void *)desc, sizeof(*desc));
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cpu_physical_memory_read(addr, desc, sizeof(*desc));
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le32_to_cpus(&desc->cmdstat);
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le16_to_cpus(&desc->bytes);
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le16_to_cpus(&desc->buffer_size);
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@ -229,12 +229,12 @@ static void eth_tx_desc_put(uint32_t addr, mv88w8618_tx_desc *desc)
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cpu_to_le16s(&desc->bytes);
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cpu_to_le32s(&desc->buffer);
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cpu_to_le32s(&desc->next);
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cpu_physical_memory_write(addr, (void *)desc, sizeof(*desc));
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cpu_physical_memory_write(addr, desc, sizeof(*desc));
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}
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static void eth_tx_desc_get(uint32_t addr, mv88w8618_tx_desc *desc)
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{
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cpu_physical_memory_read(addr, (void *)desc, sizeof(*desc));
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cpu_physical_memory_read(addr, desc, sizeof(*desc));
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le32_to_cpus(&desc->cmdstat);
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le16_to_cpus(&desc->res);
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le16_to_cpus(&desc->bytes);
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@ -970,7 +970,7 @@ static void n800_gpmc_init(struct n800_s *s)
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(4 << 0); /* BASEADDRESS */
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cpu_physical_memory_write(0x6800a078, /* GPMC_CONFIG7_0 */
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(void *) &config7, sizeof(config7));
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&config7, sizeof(config7));
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}
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/* Setup sequence done by the bootloader */
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@ -982,7 +982,7 @@ static void n8x0_boot_init(void *opaque)
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/* PRCM setup */
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#define omap_writel(addr, val) \
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buf = (val); \
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cpu_physical_memory_write(addr, (void *) &buf, sizeof(buf))
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cpu_physical_memory_write(addr, &buf, sizeof(buf))
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omap_writel(0x48008060, 0x41); /* PRCM_CLKSRC_CTRL */
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omap_writel(0x48008070, 1); /* PRCM_CLKOUT_CTRL */
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@ -31,7 +31,7 @@ uint32_t omap_badwidth_read8(void *opaque, hwaddr addr)
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uint8_t ret;
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OMAP_8B_REG(addr);
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cpu_physical_memory_read(addr, (void *) &ret, 1);
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cpu_physical_memory_read(addr, &ret, 1);
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return ret;
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}
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@ -41,7 +41,7 @@ void omap_badwidth_write8(void *opaque, hwaddr addr,
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uint8_t val8 = value;
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OMAP_8B_REG(addr);
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cpu_physical_memory_write(addr, (void *) &val8, 1);
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cpu_physical_memory_write(addr, &val8, 1);
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}
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uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
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@ -49,7 +49,7 @@ uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
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uint16_t ret;
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OMAP_16B_REG(addr);
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cpu_physical_memory_read(addr, (void *) &ret, 2);
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cpu_physical_memory_read(addr, &ret, 2);
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return ret;
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}
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@ -59,7 +59,7 @@ void omap_badwidth_write16(void *opaque, hwaddr addr,
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uint16_t val16 = value;
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OMAP_16B_REG(addr);
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cpu_physical_memory_write(addr, (void *) &val16, 2);
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cpu_physical_memory_write(addr, &val16, 2);
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}
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uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
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@ -67,7 +67,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
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uint32_t ret;
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OMAP_32B_REG(addr);
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cpu_physical_memory_read(addr, (void *) &ret, 4);
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cpu_physical_memory_read(addr, &ret, 4);
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return ret;
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}
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@ -75,7 +75,7 @@ void omap_badwidth_write32(void *opaque, hwaddr addr,
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uint32_t value)
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{
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OMAP_32B_REG(addr);
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cpu_physical_memory_write(addr, (void *) &value, 4);
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cpu_physical_memory_write(addr, &value, 4);
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}
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/* MPU OS timers */
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