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target/xtensa linux-user support.
- small cleanup for xtensa registers dumping (-d cpu); - add support for debugging linux-user process with xtensa-linux-gdb (as opposed to xtensa-elf-gdb), which can only access unprivileged registers; - enable MTTCG for target/xtensa; - cleanup in linux-user/mmap area making sure that it works correctly with limited 30-bit-wide user address space; - import xtensa-specific definitions from the linux kernel, conditionalize user-only/softmmu-only code and add handlers for signals, exceptions, process/thread creation and core registers dumping. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAlqr9NsTHGpjbXZia2Jj QGdtYWlsLmNvbQAKCRBR+cyR+D+gRHjDD/9dQxuirsTjU+oO2OMU5YjDBF6Hy+KA O4hJoWh/jNyUzgZOAtmpbZmuB1GJ5gNDhl5lifEFIWtAqf/qi/M87ibCQbdjFQ+t sT+FVgSU9X16J9wBKtUPV4DBMeMvJenHtFlCCw6oZxF5cnqGXw7e4yQtn7/KI8jT ymu7hiCaGJJ4ao/FG8KbIs3iSpQcfbIN7kEfuL92tMNjVWWTnNVhPVxyg3Bojkib pRFELL/BO3Ud3P83BncA5TNp6O1rFwKRYBK9nwLGWrjFMEbomdT5LWSZuZK9UVN9 aLoC/GnvGCnvAth8E4L0dDOmyz9MRDJ5rYJoaxoEVYzvz8rexVyAjpC/zOrJVxuK xrgandQtrFGkp5NJD6QpM92b7YDyR1w1s24KlehZivzHoN83cN3CuCHLWcqgicza /x4r/OQ4uiSUTex2Cg2hVQJR6m1LkJKa94Mimrd7G/zCHSF/BDks170o5DpW7JT8 QWfYTtZg13auzPsgZmGE+/b1o5PBXhnlBPzD983X6u5cgS5RWyik3jhmp5rEx8wH sxV5kvMb96JlUDCuwPTu9zJhJ3rqbWtCR7+4Sh1PCcsr6vVgsV0EZHAapwrG5GPp pOxLlZ54ObK3oSW6SB8TnS1rEiGkBHMhSL1O6VdKOvAXFPCVZsIGBGTpuf6MEn6c hRg0iBGQ6GMUUw== =UCny -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/xtensa/tags/20180316-xtensa' into staging target/xtensa linux-user support. - small cleanup for xtensa registers dumping (-d cpu); - add support for debugging linux-user process with xtensa-linux-gdb (as opposed to xtensa-elf-gdb), which can only access unprivileged registers; - enable MTTCG for target/xtensa; - cleanup in linux-user/mmap area making sure that it works correctly with limited 30-bit-wide user address space; - import xtensa-specific definitions from the linux kernel, conditionalize user-only/softmmu-only code and add handlers for signals, exceptions, process/thread creation and core registers dumping. # gpg: Signature made Fri 16 Mar 2018 16:46:19 GMT # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20180316-xtensa: MAINTAINERS: fix W: address for xtensa qemu-binfmt-conf.sh: add qemu-xtensa target/xtensa: add linux-user support linux-user: drop unused target_msync function linux-user: fix target_mprotect/target_munmap error return values linux-user: fix assertion in shmdt linux-user: fix mmap/munmap/mprotect/mremap/shmat target/xtensa: support MTTCG target/xtensa: use correct number of registers in gdbstub target/xtensa: mark register windows in the dump target/xtensa: dump correct physical registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # linux-user/syscall.c
This commit is contained in:
Peter Maydell
commit
e1e44a9916
26 changed files with 1790 additions and 75 deletions
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@ -7048,6 +7048,260 @@ long do_rt_sigreturn(CPUArchState *env)
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return -TARGET_QEMU_ESIGRETURN;
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}
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#elif defined(TARGET_XTENSA)
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struct target_sigcontext {
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abi_ulong sc_pc;
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abi_ulong sc_ps;
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abi_ulong sc_lbeg;
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abi_ulong sc_lend;
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abi_ulong sc_lcount;
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abi_ulong sc_sar;
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abi_ulong sc_acclo;
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abi_ulong sc_acchi;
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abi_ulong sc_a[16];
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abi_ulong sc_xtregs;
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};
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struct target_ucontext {
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abi_ulong tuc_flags;
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abi_ulong tuc_link;
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target_stack_t tuc_stack;
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struct target_sigcontext tuc_mcontext;
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target_sigset_t tuc_sigmask;
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};
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struct target_rt_sigframe {
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target_siginfo_t info;
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struct target_ucontext uc;
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/* TODO: xtregs */
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uint8_t retcode[6];
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abi_ulong window[4];
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};
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static abi_ulong get_sigframe(struct target_sigaction *sa,
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CPUXtensaState *env,
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unsigned long framesize)
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{
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abi_ulong sp = env->regs[1];
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/* This is the X/Open sanctioned signal stack switching. */
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if ((sa->sa_flags & TARGET_SA_ONSTACK) != 0 && !sas_ss_flags(sp)) {
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sp = target_sigaltstack_used.ss_sp + target_sigaltstack_used.ss_size;
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}
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return (sp - framesize) & -16;
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}
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static int flush_window_regs(CPUXtensaState *env)
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{
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const uint32_t nareg_mask = env->config->nareg - 1;
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uint32_t wb = env->sregs[WINDOW_BASE];
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uint32_t ws = (xtensa_replicate_windowstart(env) >> (wb + 1)) &
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((1 << env->config->nareg / 4) - 1);
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uint32_t d = ctz32(ws) + 1;
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uint32_t sp;
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abi_long ret = 0;
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wb += d;
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ws >>= d;
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xtensa_sync_phys_from_window(env);
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sp = env->phys_regs[(wb * 4 + 1) & nareg_mask];
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while (ws && ret == 0) {
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int d;
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int i;
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int idx;
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if (ws & 0x1) {
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ws >>= 1;
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d = 1;
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} else if (ws & 0x2) {
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ws >>= 2;
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d = 2;
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for (i = 0; i < 4; ++i) {
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idx = (wb * 4 + 4 + i) & nareg_mask;
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ret |= put_user_ual(env->phys_regs[idx], sp + (i - 12) * 4);
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}
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} else if (ws & 0x4) {
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ws >>= 3;
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d = 3;
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for (i = 0; i < 8; ++i) {
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idx = (wb * 4 + 4 + i) & nareg_mask;
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ret |= put_user_ual(env->phys_regs[idx], sp + (i - 16) * 4);
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}
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} else {
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g_assert_not_reached();
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}
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sp = env->phys_regs[((wb + d) * 4 + 1) & nareg_mask];
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for (i = 0; i < 4; ++i) {
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idx = (wb * 4 + i) & nareg_mask;
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ret |= put_user_ual(env->phys_regs[idx], sp + (i - 4) * 4);
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}
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wb += d;
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}
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return ret == 0;
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}
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static int setup_sigcontext(struct target_rt_sigframe *frame,
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CPUXtensaState *env)
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{
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struct target_sigcontext *sc = &frame->uc.tuc_mcontext;
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int i;
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__put_user(env->pc, &sc->sc_pc);
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__put_user(env->sregs[PS], &sc->sc_ps);
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__put_user(env->sregs[LBEG], &sc->sc_lbeg);
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__put_user(env->sregs[LEND], &sc->sc_lend);
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__put_user(env->sregs[LCOUNT], &sc->sc_lcount);
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if (!flush_window_regs(env)) {
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return 0;
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}
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for (i = 0; i < 16; ++i) {
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__put_user(env->regs[i], sc->sc_a + i);
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}
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__put_user(0, &sc->sc_xtregs);
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/* TODO: xtregs */
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return 1;
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}
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static void setup_rt_frame(int sig, struct target_sigaction *ka,
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target_siginfo_t *info,
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target_sigset_t *set, CPUXtensaState *env)
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{
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abi_ulong frame_addr;
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struct target_rt_sigframe *frame;
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uint32_t ra;
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int i;
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frame_addr = get_sigframe(ka, env, sizeof(*frame));
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trace_user_setup_rt_frame(env, frame_addr);
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if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) {
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goto give_sigsegv;
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}
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if (ka->sa_flags & SA_SIGINFO) {
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tswap_siginfo(&frame->info, info);
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}
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__put_user(0, &frame->uc.tuc_flags);
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__put_user(0, &frame->uc.tuc_link);
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__put_user(target_sigaltstack_used.ss_sp,
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&frame->uc.tuc_stack.ss_sp);
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__put_user(sas_ss_flags(env->regs[1]),
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&frame->uc.tuc_stack.ss_flags);
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__put_user(target_sigaltstack_used.ss_size,
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&frame->uc.tuc_stack.ss_size);
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if (!setup_sigcontext(frame, env)) {
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unlock_user_struct(frame, frame_addr, 0);
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goto give_sigsegv;
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}
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for (i = 0; i < TARGET_NSIG_WORDS; ++i) {
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__put_user(set->sig[i], &frame->uc.tuc_sigmask.sig[i]);
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}
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if (ka->sa_flags & TARGET_SA_RESTORER) {
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ra = ka->sa_restorer;
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} else {
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ra = frame_addr + offsetof(struct target_rt_sigframe, retcode);
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#ifdef TARGET_WORDS_BIGENDIAN
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/* Generate instruction: MOVI a2, __NR_rt_sigreturn */
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__put_user(0x22, &frame->retcode[0]);
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__put_user(0x0a, &frame->retcode[1]);
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__put_user(TARGET_NR_rt_sigreturn, &frame->retcode[2]);
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/* Generate instruction: SYSCALL */
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__put_user(0x00, &frame->retcode[3]);
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__put_user(0x05, &frame->retcode[4]);
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__put_user(0x00, &frame->retcode[5]);
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#else
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/* Generate instruction: MOVI a2, __NR_rt_sigreturn */
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__put_user(0x22, &frame->retcode[0]);
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__put_user(0xa0, &frame->retcode[1]);
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__put_user(TARGET_NR_rt_sigreturn, &frame->retcode[2]);
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/* Generate instruction: SYSCALL */
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__put_user(0x00, &frame->retcode[3]);
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__put_user(0x50, &frame->retcode[4]);
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__put_user(0x00, &frame->retcode[5]);
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#endif
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}
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env->sregs[PS] = PS_UM | (3 << PS_RING_SHIFT);
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_WINDOWED_REGISTER)) {
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env->sregs[PS] |= PS_WOE | (1 << PS_CALLINC_SHIFT);
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}
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memset(env->regs, 0, sizeof(env->regs));
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env->pc = ka->_sa_handler;
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env->regs[1] = frame_addr;
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env->sregs[WINDOW_BASE] = 0;
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env->sregs[WINDOW_START] = 1;
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env->regs[4] = (ra & 0x3fffffff) | 0x40000000;
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env->regs[6] = sig;
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env->regs[7] = frame_addr + offsetof(struct target_rt_sigframe, info);
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env->regs[8] = frame_addr + offsetof(struct target_rt_sigframe, uc);
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unlock_user_struct(frame, frame_addr, 1);
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return;
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give_sigsegv:
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force_sigsegv(sig);
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return;
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}
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static void restore_sigcontext(CPUXtensaState *env,
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struct target_rt_sigframe *frame)
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{
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struct target_sigcontext *sc = &frame->uc.tuc_mcontext;
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uint32_t ps;
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int i;
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__get_user(env->pc, &sc->sc_pc);
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__get_user(ps, &sc->sc_ps);
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__get_user(env->sregs[LBEG], &sc->sc_lbeg);
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__get_user(env->sregs[LEND], &sc->sc_lend);
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__get_user(env->sregs[LCOUNT], &sc->sc_lcount);
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env->sregs[WINDOW_BASE] = 0;
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env->sregs[WINDOW_START] = 1;
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env->sregs[PS] = deposit32(env->sregs[PS],
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PS_CALLINC_SHIFT,
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PS_CALLINC_LEN,
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extract32(ps, PS_CALLINC_SHIFT,
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PS_CALLINC_LEN));
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for (i = 0; i < 16; ++i) {
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__get_user(env->regs[i], sc->sc_a + i);
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}
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/* TODO: xtregs */
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}
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long do_rt_sigreturn(CPUXtensaState *env)
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{
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abi_ulong frame_addr = env->regs[1];
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struct target_rt_sigframe *frame;
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sigset_t set;
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trace_user_do_rt_sigreturn(env, frame_addr);
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if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) {
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goto badframe;
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}
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target_to_host_sigset(&set, &frame->uc.tuc_sigmask);
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set_sigmask(&set);
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restore_sigcontext(env, frame);
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if (do_sigaltstack(frame_addr +
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offsetof(struct target_rt_sigframe, uc.tuc_stack),
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0, get_sp_from_cpustate(env)) == -TARGET_EFAULT) {
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goto badframe;
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}
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unlock_user_struct(frame, frame_addr, 0);
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return -TARGET_QEMU_ESIGRETURN;
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badframe:
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unlock_user_struct(frame, frame_addr, 0);
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force_sig(TARGET_SIGSEGV);
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return -TARGET_QEMU_ESIGRETURN;
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}
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#else
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#error Target needs to add support for signal handling
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#endif
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@ -7126,7 +7380,7 @@ static void handle_pending_signal(CPUArchState *cpu_env, int sig,
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|| defined(TARGET_OPENRISC) || defined(TARGET_TILEGX) \
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|| defined(TARGET_PPC64) || defined(TARGET_HPPA) \
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|| defined(TARGET_NIOS2) || defined(TARGET_X86_64) \
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|| defined(TARGET_RISCV)
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|| defined(TARGET_RISCV) || defined(TARGET_XTENSA)
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/* These targets do not have traditional signals. */
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setup_rt_frame(sig, sa, &k->info, &target_old_set, cpu_env);
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#else
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