hw: Replace anti-social QOM type names

Several QOM type names contain ',':

    ARM,bitband-memory
    etraxfs,pic
    etraxfs,serial
    etraxfs,timer
    fsl,imx25
    fsl,imx31
    fsl,imx6
    fsl,imx6ul
    fsl,imx7
    grlib,ahbpnp
    grlib,apbpnp
    grlib,apbuart
    grlib,gptimer
    grlib,irqmp
    qemu,register
    SUNW,bpp
    SUNW,CS4231
    SUNW,DBRI
    SUNW,DBRI.prom
    SUNW,fdtwo
    SUNW,sx
    SUNW,tcx
    xilinx,zynq_slcr
    xlnx,zynqmp
    xlnx,zynqmp-pmu-soc
    xlnx,zynq-xadc

These are all device types.  They can't be plugged with -device /
device_add, except for xlnx,zynqmp-pmu-soc, and I doubt that one
actually works.

They *can* be used with -device / device_add to request help.
Usability is poor, though: you have to double the comma, like this:

    $ qemu-system-x86_64 -device SUNW,,fdtwo,help

Trap for the unwary.  The fact that this was broken in
device-introspect-test for more than six years until commit e27bd49876
fixed it demonstrates that "the unwary" includes seasoned developers.

One QOM type name contains ' ': "ICH9 SMB".  Because having to
remember just one way to quote would be too easy.

Rename the "SUNW,FOO types to "sun-FOO".  Summarily replace ',' and '
' by '-' in the other type names.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210304140229.575481-2-armbru@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Markus Armbruster 2021-03-04 15:02:28 +01:00
parent fe9f70a1c3
commit e178113ff6
27 changed files with 40 additions and 40 deletions

View file

@ -15,7 +15,7 @@
#include "target/arm/idau.h"
#include "qom/object.h"
#define TYPE_BITBAND "ARM,bitband-memory"
#define TYPE_BITBAND "ARM-bitband-memory"
OBJECT_DECLARE_SIMPLE_TYPE(BitBandState, BITBAND)
struct BitBandState {

View file

@ -34,7 +34,7 @@
#include "target/arm/cpu.h"
#include "qom/object.h"
#define TYPE_FSL_IMX25 "fsl,imx25"
#define TYPE_FSL_IMX25 "fsl-imx25"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX25State, FSL_IMX25)
#define FSL_IMX25_NUM_UARTS 5

View file

@ -30,7 +30,7 @@
#include "target/arm/cpu.h"
#include "qom/object.h"
#define TYPE_FSL_IMX31 "fsl,imx31"
#define TYPE_FSL_IMX31 "fsl-imx31"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX31State, FSL_IMX31)
#define FSL_IMX31_NUM_UARTS 2

View file

@ -36,7 +36,7 @@
#include "cpu.h"
#include "qom/object.h"
#define TYPE_FSL_IMX6 "fsl,imx6"
#define TYPE_FSL_IMX6 "fsl-imx6"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6State, FSL_IMX6)
#define FSL_IMX6_NUM_CPUS 4

View file

@ -40,7 +40,7 @@
#include "cpu.h"
#include "qom/object.h"
#define TYPE_FSL_IMX6UL "fsl,imx6ul"
#define TYPE_FSL_IMX6UL "fsl-imx6ul"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6ULState, FSL_IMX6UL)
enum FslIMX6ULConfiguration {

View file

@ -41,7 +41,7 @@
#include "cpu.h"
#include "qom/object.h"
#define TYPE_FSL_IMX7 "fsl,imx7"
#define TYPE_FSL_IMX7 "fsl-imx7"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX7State, FSL_IMX7)
enum FslIMX7Configuration {

View file

@ -37,7 +37,7 @@
#include "net/can_emu.h"
#include "hw/dma/xlnx_csu_dma.h"
#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
#define TYPE_XLNX_ZYNQMP "xlnx-zynqmp"
OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
#define XLNX_ZYNQMP_NUM_APU_CPUS 4

View file

@ -41,7 +41,7 @@ static inline DeviceState *etraxfs_ser_create(hwaddr addr,
DeviceState *dev;
SysBusDevice *s;
dev = qdev_new("etraxfs,serial");
dev = qdev_new("etraxfs-serial");
s = SYS_BUS_DEVICE(dev);
qdev_prop_set_chr(dev, "chardev", chr);
sysbus_realize_and_unref(s, &error_fatal);

View file

@ -216,7 +216,7 @@ struct ICH9LPCState {
/* D31:F3 SMBus controller */
#define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
#define TYPE_ICH9_SMB_DEVICE "ICH9-SMB"
#define ICH9_A2_SMB_REVISION 0x02
#define ICH9_SMB_PI 0x00

View file

@ -25,10 +25,10 @@
#define GRLIB_AHB_APB_PNP_H
#include "qom/object.h"
#define TYPE_GRLIB_AHB_PNP "grlib,ahbpnp"
#define TYPE_GRLIB_AHB_PNP "grlib-ahbpnp"
OBJECT_DECLARE_SIMPLE_TYPE(AHBPnp, GRLIB_AHB_PNP)
#define TYPE_GRLIB_APB_PNP "grlib,apbpnp"
#define TYPE_GRLIB_APB_PNP "grlib-apbpnp"
OBJECT_DECLARE_SIMPLE_TYPE(APBPnp, GRLIB_APB_PNP)
void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask,

View file

@ -23,7 +23,7 @@
#define ZYNQ_XADC_NUM_ADC_REGS 128
#define ZYNQ_XADC_FIFO_DEPTH 15
#define TYPE_ZYNQ_XADC "xlnx,zynq-xadc"
#define TYPE_ZYNQ_XADC "xlnx-zynq-xadc"
OBJECT_DECLARE_SIMPLE_TYPE(ZynqXADCState, ZYNQ_XADC)
struct ZynqXADCState {

View file

@ -87,7 +87,7 @@ struct RegisterInfo {
void *opaque;
};
#define TYPE_REGISTER "qemu,register"
#define TYPE_REGISTER "qemu-register"
DECLARE_INSTANCE_CHECKER(RegisterInfo, REGISTER,
TYPE_REGISTER)

View file

@ -32,14 +32,14 @@
*/
/* IRQMP */
#define TYPE_GRLIB_IRQMP "grlib,irqmp"
#define TYPE_GRLIB_IRQMP "grlib-irqmp"
void grlib_irqmp_ack(DeviceState *dev, int intno);
/* GPTimer */
#define TYPE_GRLIB_GPTIMER "grlib,gptimer"
#define TYPE_GRLIB_GPTIMER "grlib-gptimer"
/* APB UART */
#define TYPE_GRLIB_APB_UART "grlib,apbuart"
#define TYPE_GRLIB_APB_UART "grlib-apbuart"
#endif /* GRLIB_H */