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target-arm: A64: Emulate the SMC insn
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1411718914-6608-10-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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7 changed files with 51 additions and 0 deletions
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@ -416,6 +416,32 @@ void HELPER(pre_hvc)(CPUARMState *env)
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}
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}
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void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
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{
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int cur_el = arm_current_pl(env);
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/* FIXME: Use real secure state. */
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bool secure = false;
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bool smd = env->cp15.scr_el3 & SCR_SMD;
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/* On ARMv8 AArch32, SMD only applies to NS state.
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* On ARMv7 SMD only applies to NS state and only if EL2 is available.
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* For ARMv7 non EL2, we force SMD to zero so we don't need to re-check
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* the EL2 condition here.
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*/
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bool undef = is_a64(env) ? smd : (!secure && smd);
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/* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
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if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
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env->exception.syndrome = syndrome;
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raise_exception(env, EXCP_HYP_TRAP);
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}
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/* We've already checked that EL3 exists at translation time. */
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if (undef) {
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env->exception.syndrome = syn_uncategorized();
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raise_exception(env, EXCP_UDEF);
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}
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}
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void HELPER(exception_return)(CPUARMState *env)
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{
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int cur_el = arm_current_pl(env);
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