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sh7750: handle MMUCR TI bit

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When the MMUCR TI bit is set, all the UTLB and ITLB entries should be
flushed.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2010-02-02 19:39:11 +01:00
parent 434254aa5f
commit e0bcb9ca36
3 changed files with 25 additions and 2 deletions
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7
hw/sh7750.c
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@ -396,8 +396,11 @@ static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr,
portb_changed(s, temp);
return;
case SH7750_MMUCR_A7:
s->cpu->mmucr = mem_value;
return;
if (mem_value & MMUCR_TI) {
cpu_sh4_invalidate_tlb(s->cpu);
}
s->cpu->mmucr = mem_value & ~MMUCR_TI;
return;
case SH7750_PTEH_A7:
/* If asid changes, clear all registered tlb entries. */
if ((s->cpu->pteh & 0xff) != (mem_value & 0xff))