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tests/tcg: refine MMX support in SSE tests
Extend the support to memory operands, and skip MMX instructions that were introduced in SSE times, because they are now covered in test-mmx. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
fa7ce0b028
commit
e02907cc12
1 changed files with 26 additions and 6 deletions
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@ -103,7 +103,11 @@ class XMMArg():
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class MMArg():
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class MMArg():
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isxmm = True
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isxmm = True
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ismem = False # TODO
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def __init__(self, mw):
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if mw not in [0, 32, 64]:
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raise Exception("Bad mem width: %s" % mw)
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self.mw = mw
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self.ismem = mw != 0
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def regstr(self, n):
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def regstr(self, n):
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return "mm%d" % (n & 7)
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return "mm%d" % (n & 7)
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@ -169,6 +173,9 @@ class ArgMem():
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def regstr(self, n):
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def regstr(self, n):
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return mem_w(self.w)
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return mem_w(self.w)
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class SkipInstruction(Exception):
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pass
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def ArgGenerator(arg, op):
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def ArgGenerator(arg, op):
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if arg[:3] == 'xmm' or arg[:3] == "ymm":
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if arg[:3] == 'xmm' or arg[:3] == "ymm":
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if "/" in arg:
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if "/" in arg:
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@ -179,7 +186,13 @@ def ArgGenerator(arg, op):
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else:
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else:
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return XMMArg(arg[0], 0);
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return XMMArg(arg[0], 0);
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elif arg[:2] == 'mm':
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elif arg[:2] == 'mm':
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return MMArg();
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if "/" in arg:
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r, m = arg.split('/')
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if (m[0] != 'm'):
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raise Exception("Expected /m: %s", arg)
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return MMArg(int(m[1:]));
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else:
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return MMArg(0);
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elif arg[:4] == 'imm8':
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elif arg[:4] == 'imm8':
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return ArgImm8u(op);
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return ArgImm8u(op);
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elif arg == '<XMM0>':
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elif arg == '<XMM0>':
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@ -217,8 +230,12 @@ class InsnGenerator:
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try:
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try:
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self.args = list(ArgGenerator(a, op) for a in args)
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self.args = list(ArgGenerator(a, op) for a in args)
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if not any((x.isxmm for x in self.args)):
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raise SkipInstruction
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if len(self.args) > 0 and self.args[-1] is None:
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if len(self.args) > 0 and self.args[-1] is None:
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self.args = self.args[:-1]
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self.args = self.args[:-1]
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except SkipInstruction:
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raise
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except Exception as e:
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except Exception as e:
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raise Exception("Bad arg %s: %s" % (op, e))
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raise Exception("Bad arg %s: %s" % (op, e))
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@ -339,10 +356,13 @@ def main():
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continue
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continue
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cpuid = row[6]
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cpuid = row[6]
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if cpuid in archs:
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if cpuid in archs:
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g = InsnGenerator(insn[0], insn[1:])
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try:
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for insn in g.gen():
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g = InsnGenerator(insn[0], insn[1:])
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outf.write('TEST(%d, "%s", %s)\n' % (n, insn, g.optype))
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for insn in g.gen():
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n += 1
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outf.write('TEST(%d, "%s", %s)\n' % (n, insn, g.optype))
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n += 1
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except SkipInstruction:
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pass
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outf.write("#undef TEST\n")
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outf.write("#undef TEST\n")
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csvfile.close()
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csvfile.close()
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