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target/arm: Split out gen_rebuild_hflags
For aa32, the function has a parameter to use the new el. For aa64, that never happens. Use tcg_constant_i32 while we're at it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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667a4e6235
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2 changed files with 33 additions and 28 deletions
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@ -341,6 +341,11 @@ static void a64_free_cc(DisasCompare64 *c64)
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tcg_temp_free_i64(c64->value);
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}
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static void gen_rebuild_hflags(DisasContext *s)
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{
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gen_helper_rebuild_hflags_a64(cpu_env, tcg_constant_i32(s->current_el));
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}
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static void gen_exception_internal(int excp)
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{
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TCGv_i32 tcg_excp = tcg_const_i32(excp);
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@ -1667,9 +1672,7 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
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} else {
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clear_pstate_bits(PSTATE_UAO);
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}
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t1 = tcg_const_i32(s->current_el);
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gen_helper_rebuild_hflags_a64(cpu_env, t1);
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tcg_temp_free_i32(t1);
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gen_rebuild_hflags(s);
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break;
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case 0x04: /* PAN */
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@ -1681,9 +1684,7 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
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} else {
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clear_pstate_bits(PSTATE_PAN);
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}
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t1 = tcg_const_i32(s->current_el);
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gen_helper_rebuild_hflags_a64(cpu_env, t1);
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tcg_temp_free_i32(t1);
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gen_rebuild_hflags(s);
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break;
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case 0x05: /* SPSel */
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@ -1741,9 +1742,7 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
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} else {
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clear_pstate_bits(PSTATE_TCO);
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}
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t1 = tcg_const_i32(s->current_el);
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gen_helper_rebuild_hflags_a64(cpu_env, t1);
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tcg_temp_free_i32(t1);
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gen_rebuild_hflags(s);
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/* Many factors, including TCO, go into MTE_ACTIVE. */
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s->base.is_jmp = DISAS_UPDATE_NOCHAIN;
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} else if (dc_isar_feature(aa64_mte_insn_reg, s)) {
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@ -1990,9 +1989,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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* A write to any coprocessor regiser that ends a TB
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* must rebuild the hflags for the next TB.
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*/
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TCGv_i32 tcg_el = tcg_const_i32(s->current_el);
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gen_helper_rebuild_hflags_a64(cpu_env, tcg_el);
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tcg_temp_free_i32(tcg_el);
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gen_rebuild_hflags(s);
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/*
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* We default to ending the TB on a coprocessor register write,
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* but allow this to be suppressed by the register definition
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