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accel/tcg: Introduce translator_io_start
New wrapper around gen_io_start which takes care of the USE_ICOUNT check, as well as marking the DisasContext to end the TB. Remove exec/gen-icount.h. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
5623423359
commit
dfd1b81274
33 changed files with 117 additions and 269 deletions
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@ -67,8 +67,8 @@ enum {
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ARM_CP_ALIAS = 1 << 8,
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/*
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* Flag: Register does I/O and therefore its accesses need to be marked
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* with gen_io_start() and also end the TB. In particular, registers which
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* implement clocks or timers require this.
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* with translator_io_start() and also end the TB. In particular,
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* registers which implement clocks or timers require this.
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*/
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ARM_CP_IO = 1 << 9,
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/*
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@ -28,7 +28,6 @@
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#include "internals.h"
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#include "qemu/host-utils.h"
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#include "semihosting/semihost.h"
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#include "exec/gen-icount.h"
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#include "exec/log.h"
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#include "cpregs.h"
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#include "translate-a64.h"
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@ -1552,9 +1551,7 @@ static bool trans_ERET(DisasContext *s, arg_ERET *a)
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tcg_gen_ld_i64(dst, cpu_env,
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offsetof(CPUARMState, elr_el[s->current_el]));
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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}
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translator_io_start(&s->base);
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gen_helper_exception_return(cpu_env, dst);
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/* Must exit loop to check un-masked IRQs */
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@ -1582,9 +1579,8 @@ static bool trans_ERETA(DisasContext *s, arg_reta *a)
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offsetof(CPUARMState, elr_el[s->current_el]));
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dst = auth_branch_target(s, dst, cpu_X[31], !a->m);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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}
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translator_io_start(&s->base);
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gen_helper_exception_return(cpu_env, dst);
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/* Must exit loop to check un-masked IRQs */
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@ -2044,6 +2040,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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uint32_t key = ENCODE_AA64_CP_REG(CP_REG_ARM64_SYSREG_CP,
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crn, crm, op0, op1, op2);
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const ARMCPRegInfo *ri = get_arm_cp_reginfo(s->cp_regs, key);
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bool need_exit_tb = false;
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TCGv_ptr tcg_ri = NULL;
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TCGv_i64 tcg_rt;
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@ -2171,8 +2168,9 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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return;
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}
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if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
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gen_io_start();
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if (ri->type & ARM_CP_IO) {
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/* I/O operations must end the TB here (whether read or write) */
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need_exit_tb = translator_io_start(&s->base);
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}
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tcg_rt = cpu_reg(s, rt);
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@ -2202,10 +2200,6 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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}
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}
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if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
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/* I/O operations must end the TB here (whether read or write) */
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s->base.is_jmp = DISAS_UPDATE_EXIT;
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}
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if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
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/*
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* A write to any coprocessor regiser that ends a TB
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@ -2217,6 +2211,9 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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* but allow this to be suppressed by the register definition
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* (usually only necessary to work around guest bugs).
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*/
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need_exit_tb = true;
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}
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if (need_exit_tb) {
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s->base.is_jmp = DISAS_UPDATE_EXIT;
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}
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}
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@ -21,7 +21,6 @@
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#include "tcg/tcg-op.h"
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#include "tcg/tcg-op-gvec.h"
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#include "exec/exec-all.h"
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#include "exec/gen-icount.h"
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#include "translate.h"
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#include "translate-a32.h"
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@ -24,7 +24,6 @@
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#include "tcg/tcg-op.h"
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#include "tcg/tcg-op-gvec.h"
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#include "exec/exec-all.h"
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#include "exec/gen-icount.h"
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#include "translate.h"
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#include "translate-a32.h"
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@ -24,7 +24,6 @@
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#include "tcg/tcg-op.h"
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#include "tcg/tcg-op-gvec.h"
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#include "exec/exec-all.h"
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#include "exec/gen-icount.h"
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#include "translate.h"
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#include "translate-a32.h"
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@ -117,9 +116,8 @@ static void gen_preserve_fp_state(DisasContext *s, bool skip_context_update)
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* so we must mark it as an IO operation for icount (and cause
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* this to be the last insn in the TB).
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*/
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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if (translator_io_start(&s->base)) {
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s->base.is_jmp = DISAS_UPDATE_EXIT;
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gen_io_start();
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}
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gen_helper_v7m_preserve_fp_state(cpu_env);
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/*
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@ -34,7 +34,6 @@
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#include "cpregs.h"
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#include "translate.h"
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#include "translate-a32.h"
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#include "exec/gen-icount.h"
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#include "exec/helper-proto.h"
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#define HELPER_H "helper.h"
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@ -2908,9 +2907,7 @@ static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr)
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* appropriately depending on the new Thumb bit, so it must
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* be called after storing the new PC.
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*/
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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}
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translator_io_start(&s->base);
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gen_helper_cpsr_write_eret(cpu_env, cpsr);
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/* Must exit loop to check un-masked IRQs */
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s->base.is_jmp = DISAS_EXIT;
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@ -4559,7 +4556,7 @@ static void do_coproc_insn(DisasContext *s, int cpnum, int is64,
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uint32_t key = ENCODE_CP_REG(cpnum, is64, s->ns, crn, crm, opc1, opc2);
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const ARMCPRegInfo *ri = get_arm_cp_reginfo(s->cp_regs, key);
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TCGv_ptr tcg_ri = NULL;
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bool need_exit_tb;
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bool need_exit_tb = false;
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uint32_t syndrome;
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/*
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@ -4704,8 +4701,9 @@ static void do_coproc_insn(DisasContext *s, int cpnum, int is64,
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g_assert_not_reached();
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}
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if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
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gen_io_start();
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if (ri->type & ARM_CP_IO) {
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/* I/O operations must end the TB here (whether read or write) */
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need_exit_tb = translator_io_start(&s->base);
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}
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if (isread) {
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@ -4787,10 +4785,6 @@ static void do_coproc_insn(DisasContext *s, int cpnum, int is64,
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}
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}
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/* I/O operations must end the TB here (whether read or write) */
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need_exit_tb = ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) &&
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(ri->type & ARM_CP_IO));
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if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
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/*
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* A write to any coprocessor register that ends a TB
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@ -8047,9 +8041,7 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a, int min_n)
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if (exc_return) {
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/* Restore CPSR from SPSR. */
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tmp = load_cpu_field(spsr);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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}
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translator_io_start(&s->base);
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gen_helper_cpsr_write_eret(cpu_env, tmp);
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/* Must exit loop to check un-masked IRQs */
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s->base.is_jmp = DISAS_EXIT;
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