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hw/hppa: Make number of TLB and BTLB entries configurable
Until now the TLB size was fixed at 256 entries. To allow operating systems to utilize more TLB entries in the future, we need to tell firmware how many TLB entries we actually support in the emulation. Firmware then reports this to the operating system via the PDC_CACHE_INFO call. This patch simply does the preparation to allow more TLB entries. Signed-off-by: Helge Deller <deller@gmx.de>
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parent
009673edd9
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2 changed files with 12 additions and 1 deletions
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@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
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fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
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g_memdup(&val, sizeof(val)), sizeof(val));
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val = cpu_to_le64(HPPA_TLB_ENTRIES);
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fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
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g_memdup(&val, sizeof(val)), sizeof(val));
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val = cpu_to_le64(HPPA_BTLB_ENTRIES);
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fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
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g_memdup(&val, sizeof(val)), sizeof(val));
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return fw_cfg;
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}
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@ -196,9 +196,12 @@ struct CPUHPPAState {
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target_ureg shadow[7]; /* shadow registers */
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/* ??? The number of entries isn't specified by the architecture. */
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#define HPPA_TLB_ENTRIES 256
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#define HPPA_BTLB_ENTRIES 0
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/* ??? Implement a unified itlb/dtlb for the moment. */
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/* ??? We should use a more intelligent data structure. */
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hppa_tlb_entry tlb[256];
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hppa_tlb_entry tlb[HPPA_TLB_ENTRIES];
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uint32_t tlb_last;
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};
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