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https://github.com/Motorhead1991/qemu.git
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dma: eliminate DMAContext
The DMAContext is a simple pointer to an AddressSpace that is now always already available. Make everyone hold the address space directly, and clean up the DMA API to use the AddressSpace directly. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
parent
96478592a9
commit
df32fd1c9f
23 changed files with 117 additions and 148 deletions
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@ -242,7 +242,6 @@ struct PCIDevice {
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PCIIORegion io_regions[PCI_NUM_REGIONS];
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AddressSpace bus_master_as;
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MemoryRegion bus_master_enable_region;
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DMAContext *dma;
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/* do not access the following fields */
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PCIConfigReadFunc *config_read;
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@ -639,15 +638,15 @@ static inline uint32_t pci_config_size(const PCIDevice *d)
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}
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/* DMA access functions */
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static inline DMAContext *pci_dma_context(PCIDevice *dev)
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static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
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{
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return dev->dma;
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return &dev->bus_master_as;
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}
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static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
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void *buf, dma_addr_t len, DMADirection dir)
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{
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dma_memory_rw(pci_dma_context(dev), addr, buf, len, dir);
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dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
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return 0;
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}
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@ -667,12 +666,12 @@ static inline int pci_dma_write(PCIDevice *dev, dma_addr_t addr,
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static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \
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dma_addr_t addr) \
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{ \
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return ld##_l##_dma(pci_dma_context(dev), addr); \
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return ld##_l##_dma(pci_get_address_space(dev), addr); \
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} \
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static inline void st##_s##_pci_dma(PCIDevice *dev, \
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dma_addr_t addr, uint##_bits##_t val) \
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{ \
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st##_s##_dma(pci_dma_context(dev), addr, val); \
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st##_s##_dma(pci_get_address_space(dev), addr, val); \
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}
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PCI_DMA_DEFINE_LDST(ub, b, 8);
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@ -690,20 +689,20 @@ static inline void *pci_dma_map(PCIDevice *dev, dma_addr_t addr,
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{
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void *buf;
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buf = dma_memory_map(pci_dma_context(dev), addr, plen, dir);
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buf = dma_memory_map(pci_get_address_space(dev), addr, plen, dir);
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return buf;
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}
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static inline void pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len,
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DMADirection dir, dma_addr_t access_len)
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{
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dma_memory_unmap(pci_dma_context(dev), buffer, len, dir, access_len);
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dma_memory_unmap(pci_get_address_space(dev), buffer, len, dir, access_len);
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}
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static inline void pci_dma_sglist_init(QEMUSGList *qsg, PCIDevice *dev,
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int alloc_hint)
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{
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qemu_sglist_init(qsg, alloc_hint, pci_dma_context(dev));
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qemu_sglist_init(qsg, alloc_hint, pci_get_address_space(dev));
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}
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extern const VMStateDescription vmstate_pci_device;
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@ -64,7 +64,6 @@ struct VIOsPAPRDevice {
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target_ulong signal_state;
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VIOsPAPR_CRQ crq;
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AddressSpace as;
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DMAContext dma;
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sPAPRTCETable *tcet;
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};
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@ -93,35 +92,35 @@ static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
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static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr,
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uint32_t size, DMADirection dir)
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{
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return dma_memory_valid(&dev->dma, taddr, size, dir);
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return dma_memory_valid(&dev->as, taddr, size, dir);
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}
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static inline int spapr_vio_dma_read(VIOsPAPRDevice *dev, uint64_t taddr,
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void *buf, uint32_t size)
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{
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return (dma_memory_read(&dev->dma, taddr, buf, size) != 0) ?
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return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
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H_DEST_PARM : H_SUCCESS;
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}
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static inline int spapr_vio_dma_write(VIOsPAPRDevice *dev, uint64_t taddr,
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const void *buf, uint32_t size)
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{
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return (dma_memory_write(&dev->dma, taddr, buf, size) != 0) ?
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return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
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H_DEST_PARM : H_SUCCESS;
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}
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static inline int spapr_vio_dma_set(VIOsPAPRDevice *dev, uint64_t taddr,
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uint8_t c, uint32_t size)
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{
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return (dma_memory_set(&dev->dma, taddr, c, size) != 0) ?
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return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
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H_DEST_PARM : H_SUCCESS;
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}
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#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->dma, (_addr), (_val)))
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#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->dma, (_addr), (_val)))
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#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->dma, (_addr), (_val)))
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#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->dma, (_addr), (_val)))
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#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->dma, (_addr)))
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#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
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#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
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#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
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#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
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#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
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int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq);
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@ -12,11 +12,11 @@
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#include <stdio.h>
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#include "exec/memory.h"
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#include "exec/address-spaces.h"
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#include "hw/hw.h"
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#include "block/block.h"
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#include "sysemu/kvm.h"
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typedef struct DMAContext DMAContext;
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typedef struct ScatterGatherEntry ScatterGatherEntry;
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typedef enum {
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@ -29,7 +29,7 @@ struct QEMUSGList {
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int nsg;
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int nalloc;
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size_t size;
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DMAContext *dma;
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AddressSpace *as;
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};
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#ifndef CONFIG_USER_ONLY
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@ -46,16 +46,7 @@ typedef uint64_t dma_addr_t;
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#define DMA_ADDR_BITS 64
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#define DMA_ADDR_FMT "%" PRIx64
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struct DMAContext {
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AddressSpace *as;
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};
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/* A global DMA context corresponding to the address_space_memory
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* AddressSpace, for sysbus devices which do DMA.
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*/
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extern DMAContext dma_context_memory;
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static inline void dma_barrier(DMAContext *dma, DMADirection dir)
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static inline void dma_barrier(AddressSpace *as, DMADirection dir)
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{
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/*
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* This is called before DMA read and write operations
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@ -83,105 +74,105 @@ static inline void dma_barrier(DMAContext *dma, DMADirection dir)
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/* Checks that the given range of addresses is valid for DMA. This is
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* useful for certain cases, but usually you should just use
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* dma_memory_{read,write}() and check for errors */
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static inline bool dma_memory_valid(DMAContext *dma,
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static inline bool dma_memory_valid(AddressSpace *as,
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dma_addr_t addr, dma_addr_t len,
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DMADirection dir)
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{
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return address_space_access_valid(dma->as, addr, len,
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return address_space_access_valid(as, addr, len,
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dir == DMA_DIRECTION_FROM_DEVICE);
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}
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static inline int dma_memory_rw_relaxed(DMAContext *dma, dma_addr_t addr,
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static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
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void *buf, dma_addr_t len,
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DMADirection dir)
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{
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return address_space_rw(dma->as, addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
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return address_space_rw(as, addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
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}
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static inline int dma_memory_read_relaxed(DMAContext *dma, dma_addr_t addr,
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static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
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void *buf, dma_addr_t len)
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{
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return dma_memory_rw_relaxed(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
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return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
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}
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static inline int dma_memory_write_relaxed(DMAContext *dma, dma_addr_t addr,
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static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
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const void *buf, dma_addr_t len)
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{
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return dma_memory_rw_relaxed(dma, addr, (void *)buf, len,
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return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
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DMA_DIRECTION_FROM_DEVICE);
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}
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static inline int dma_memory_rw(DMAContext *dma, dma_addr_t addr,
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static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
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void *buf, dma_addr_t len,
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DMADirection dir)
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{
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dma_barrier(dma, dir);
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dma_barrier(as, dir);
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return dma_memory_rw_relaxed(dma, addr, buf, len, dir);
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return dma_memory_rw_relaxed(as, addr, buf, len, dir);
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}
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static inline int dma_memory_read(DMAContext *dma, dma_addr_t addr,
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static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
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void *buf, dma_addr_t len)
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{
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return dma_memory_rw(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
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return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
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}
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static inline int dma_memory_write(DMAContext *dma, dma_addr_t addr,
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static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
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const void *buf, dma_addr_t len)
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{
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return dma_memory_rw(dma, addr, (void *)buf, len,
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return dma_memory_rw(as, addr, (void *)buf, len,
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DMA_DIRECTION_FROM_DEVICE);
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}
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int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len);
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int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
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static inline void *dma_memory_map(DMAContext *dma,
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static inline void *dma_memory_map(AddressSpace *as,
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dma_addr_t addr, dma_addr_t *len,
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DMADirection dir)
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{
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hwaddr xlen = *len;
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void *p;
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p = address_space_map(dma->as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);
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p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);
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*len = xlen;
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return p;
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}
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static inline void dma_memory_unmap(DMAContext *dma,
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static inline void dma_memory_unmap(AddressSpace *as,
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void *buffer, dma_addr_t len,
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DMADirection dir, dma_addr_t access_len)
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{
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address_space_unmap(dma->as, buffer, (hwaddr)len,
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address_space_unmap(as, buffer, (hwaddr)len,
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dir == DMA_DIRECTION_FROM_DEVICE, access_len);
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}
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#define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \
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static inline uint##_bits##_t ld##_lname##_##_end##_dma(DMAContext *dma, \
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static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *as, \
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dma_addr_t addr) \
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{ \
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uint##_bits##_t val; \
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dma_memory_read(dma, addr, &val, (_bits) / 8); \
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dma_memory_read(as, addr, &val, (_bits) / 8); \
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return _end##_bits##_to_cpu(val); \
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} \
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static inline void st##_sname##_##_end##_dma(DMAContext *dma, \
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static inline void st##_sname##_##_end##_dma(AddressSpace *as, \
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dma_addr_t addr, \
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uint##_bits##_t val) \
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{ \
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val = cpu_to_##_end##_bits(val); \
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dma_memory_write(dma, addr, &val, (_bits) / 8); \
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dma_memory_write(as, addr, &val, (_bits) / 8); \
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}
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static inline uint8_t ldub_dma(DMAContext *dma, dma_addr_t addr)
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static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
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{
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uint8_t val;
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dma_memory_read(dma, addr, &val, 1);
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dma_memory_read(as, addr, &val, 1);
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return val;
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}
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static inline void stb_dma(DMAContext *dma, dma_addr_t addr, uint8_t val)
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static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
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{
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dma_memory_write(dma, addr, &val, 1);
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dma_memory_write(as, addr, &val, 1);
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}
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DEFINE_LDST_DMA(uw, w, 16, le);
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@ -193,14 +184,12 @@ DEFINE_LDST_DMA(q, q, 64, be);
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#undef DEFINE_LDST_DMA
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void dma_context_init(DMAContext *dma, AddressSpace *as);
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struct ScatterGatherEntry {
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dma_addr_t base;
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dma_addr_t len;
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};
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void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, DMAContext *dma);
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void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as);
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void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
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void qemu_sglist_destroy(QEMUSGList *qsg);
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#endif
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