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next-cube: move floppy disk MMIO to separate memory region in next-pc
The dummy floppy disk device is part of the next-pc device, and not related to the NeXTCube SCRs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-ID: <20241222130012.1013374-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
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7bce8d1272
commit
df21980591
1 changed files with 49 additions and 12 deletions
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@ -108,6 +108,7 @@ struct NeXTPC {
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M68kCPU *cpu;
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M68kCPU *cpu;
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MemoryRegion floppy_mem;
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MemoryRegion mmiomem;
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MemoryRegion mmiomem;
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MemoryRegion scrmem;
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MemoryRegion scrmem;
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@ -368,11 +369,6 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr addr, unsigned size)
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uint64_t val;
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uint64_t val;
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switch (addr) {
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switch (addr) {
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case 0x14108:
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DPRINTF("FD read @ %x\n", (unsigned int)addr);
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val = 0x40 | 0x04 | 0x2 | 0x1;
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break;
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/*
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/*
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* These 4 registers are the hardware timer, not sure which register
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* These 4 registers are the hardware timer, not sure which register
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* is the latch instead of data, but no problems so far.
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* is the latch instead of data, but no problems so far.
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@ -402,13 +398,6 @@ static void next_scr_writefn(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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unsigned size)
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{
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{
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switch (addr) {
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switch (addr) {
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case 0x14108:
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DPRINTF("FDCSR Write: %"PRIx64 "\n", val);
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if (val == 0x0) {
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/* qemu_irq_raise(s->fd_irq[0]); */
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}
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break;
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/* Hardware timer latch - not implemented yet */
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/* Hardware timer latch - not implemented yet */
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case 0x1a000:
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case 0x1a000:
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default:
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default:
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@ -948,6 +937,47 @@ static const TypeInfo next_scsi_info = {
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.class_init = next_scsi_class_init,
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.class_init = next_scsi_class_init,
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};
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};
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static void next_floppy_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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switch (addr) {
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case 0:
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DPRINTF("FDCSR Write: %"PRIx64 "\n", val);
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if (val == 0x0) {
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/* qemu_irq_raise(s->fd_irq[0]); */
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}
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break;
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default:
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g_assert_not_reached();
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}
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}
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static uint64_t next_floppy_read(void *opaque, hwaddr addr, unsigned size)
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{
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uint64_t val;
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switch (addr) {
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case 0:
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DPRINTF("FD read @ %x\n", (unsigned int)addr);
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val = 0x40 | 0x04 | 0x2 | 0x1;
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break;
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default:
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g_assert_not_reached();
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}
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return val;
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}
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static const MemoryRegionOps next_floppy_ops = {
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.read = next_floppy_read,
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.write = next_floppy_write,
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.valid.min_access_size = 1,
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.valid.max_access_size = 4,
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.endianness = DEVICE_BIG_ENDIAN,
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};
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static void next_escc_init(DeviceState *pcdev)
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static void next_escc_init(DeviceState *pcdev)
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{
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{
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DeviceState *dev;
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DeviceState *dev;
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@ -1006,6 +1036,10 @@ static void next_pc_realize(DeviceState *dev, Error **errp)
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s->scsi_reset = qdev_get_gpio_in(d, 0);
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s->scsi_reset = qdev_get_gpio_in(d, 0);
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s->scsi_dma = qdev_get_gpio_in(d, 1);
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s->scsi_dma = qdev_get_gpio_in(d, 1);
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/* Floppy */
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memory_region_add_subregion(&s->scrmem, 0x14108,
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&s->floppy_mem);
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}
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}
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static void next_pc_init(Object *obj)
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static void next_pc_init(Object *obj)
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@ -1024,6 +1058,9 @@ static void next_pc_init(Object *obj)
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sysbus_init_mmio(sbd, &s->scrmem);
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sysbus_init_mmio(sbd, &s->scrmem);
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object_initialize_child(obj, "next-scsi", &s->next_scsi, TYPE_NEXT_SCSI);
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object_initialize_child(obj, "next-scsi", &s->next_scsi, TYPE_NEXT_SCSI);
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memory_region_init_io(&s->floppy_mem, OBJECT(s), &next_floppy_ops, s,
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"next.floppy", 4);
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}
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}
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/*
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/*
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