misc: Add a pca9554 GPIO device model

Specs are available here:

    https://www.nxp.com/docs/en/data-sheet/PCA9554_9554A.pdf

This is a simple model supporting the basic registers for GPIO
mode.  The device also supports an interrupt output line but the
model does not yet support this.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Glenn Miles 2024-02-05 17:40:16 +10:00 committed by Nicholas Piggin
parent 7b85f008b6
commit de0c7d543b
4 changed files with 391 additions and 2 deletions

36
include/hw/misc/pca9554.h Normal file
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/*
* PCA9554 I/O port
*
* Copyright (c) 2023, IBM Corporation.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef PCA9554_H
#define PCA9554_H
#include "hw/i2c/i2c.h"
#include "qom/object.h"
#define TYPE_PCA9554 "pca9554"
typedef struct PCA9554State PCA9554State;
DECLARE_INSTANCE_CHECKER(PCA9554State, PCA9554,
TYPE_PCA9554)
#define PCA9554_NR_REGS 4
#define PCA9554_PIN_COUNT 8
struct PCA9554State {
/*< private >*/
I2CSlave i2c;
/*< public >*/
uint8_t len;
uint8_t pointer;
uint8_t regs[PCA9554_NR_REGS];
qemu_irq gpio_out[PCA9554_PIN_COUNT];
uint8_t ext_state[PCA9554_PIN_COUNT];
char *description; /* For debugging purpose only */
};
#endif

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/*
* PCA9554 I/O port registers
*
* Copyright (c) 2023, IBM Corporation.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef PCA9554_REGS_H
#define PCA9554_REGS_H
/*
* Bits [0:1] are used to address a specific register.
*/
#define PCA9554_INPUT 0 /* read only input register */
#define PCA9554_OUTPUT 1 /* read/write pin output state */
#define PCA9554_POLARITY 2 /* Set polarity of input register */
#define PCA9554_CONFIG 3 /* Set pins as inputs our ouputs */
#endif