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hw/intc/loongarch_ipi: Fix ipi device access of 64bits

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In general loongarch ipi device, 32bit registers is emulated, however for
anysend/mailsend device only 64bit register access is supported. So separate
the ipi memory region into two regions, including 32 bits and 64 bits.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Xiaojuan Yang 2022-07-05 14:49:00 +08:00 • committed by Richard Henderson
parent 0df0a66555
commit ddf9326184
3 changed files with 39 additions and 11 deletions
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7
include/hw/intc/loongarch_ipi.h
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@ -24,8 +24,9 @@
#define IOCSR_MAIL_SEND 0x48
#define IOCSR_ANY_SEND 0x158
/* IPI system memory address */
#define IPI_SYSTEM_MEM 0x1fe01000
#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND)
#define MAIL_SEND_OFFSET 0
#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
#define MAX_IPI_CORE_NUM 4
#define MAX_IPI_MBX_NUM 4
@ -46,7 +47,7 @@ typedef struct IPICore {
struct LoongArchIPI {
SysBusDevice parent_obj;
MemoryRegion ipi_iocsr_mem[MAX_IPI_CORE_NUM];
MemoryRegion ipi_system_mem[MAX_IPI_CORE_NUM];
MemoryRegion ipi64_iocsr_mem[MAX_IPI_CORE_NUM];
};
#endif