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target-xtensa: add FP registers

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There are 16 32-bit FP registers (f0 - f15), control and status user
registers (fcr, fsr).

See ISA, 4.3.10 for more details.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Max Filippov 2012-09-19 04:23:54 +04:00 • committed by Blue Swirl
parent b81fe822da
commit dd519cbec6
5 changed files with 71 additions and 7 deletions
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8
gdbstub.c
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@ -1696,6 +1696,10 @@ static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
GET_REG32(env->uregs[reg->targno & 0xff]);
break;
case 4: /*f*/
GET_REG32(float32_val(env->fregs[reg->targno & 0x0f]));
break;
case 8: /*a*/
GET_REG32(env->regs[reg->targno & 0x0f]);
break;
@ -1736,6 +1740,10 @@ static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
env->uregs[reg->targno & 0xff] = tmp;
break;
case 4: /*f*/
env->fregs[reg->targno & 0x0f] = make_float32(tmp);
break;
case 8: /*a*/
env->regs[reg->targno & 0x0f] = tmp;
break;