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hw/riscv/virt: Use setprop_sized_cells for aclint
The current device tree property uses two cells for the address (and for the size), but assumes the they are less than 32 bits by hard coding the high cell to zero. Use qemu_fdt_setprop_sized_cells to do the job of splitting the upper and lower 32 bits across cells. Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-ID: <20250604025450.85327-6-joel@jms.id.au> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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4b7b4f9cb4
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1 changed files with 9 additions and 9 deletions
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@ -387,8 +387,8 @@ static void create_fdt_socket_aclint(RISCVVirtState *s,
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qemu_fdt_add_subnode(ms->fdt, name);
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qemu_fdt_add_subnode(ms->fdt, name);
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qemu_fdt_setprop_string(ms->fdt, name, "compatible",
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qemu_fdt_setprop_string(ms->fdt, name, "compatible",
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"riscv,aclint-mswi");
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"riscv,aclint-mswi");
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qemu_fdt_setprop_cells(ms->fdt, name, "reg",
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qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
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0x0, addr, 0x0, RISCV_ACLINT_SWI_SIZE);
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2, addr, 2, RISCV_ACLINT_SWI_SIZE);
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qemu_fdt_setprop(ms->fdt, name, "interrupts-extended",
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qemu_fdt_setprop(ms->fdt, name, "interrupts-extended",
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aclint_mswi_cells, aclint_cells_size);
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aclint_mswi_cells, aclint_cells_size);
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qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0);
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@ -410,11 +410,11 @@ static void create_fdt_socket_aclint(RISCVVirtState *s,
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qemu_fdt_add_subnode(ms->fdt, name);
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qemu_fdt_add_subnode(ms->fdt, name);
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qemu_fdt_setprop_string(ms->fdt, name, "compatible",
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qemu_fdt_setprop_string(ms->fdt, name, "compatible",
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"riscv,aclint-mtimer");
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"riscv,aclint-mtimer");
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qemu_fdt_setprop_cells(ms->fdt, name, "reg",
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qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
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0x0, addr + RISCV_ACLINT_DEFAULT_MTIME,
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2, addr + RISCV_ACLINT_DEFAULT_MTIME,
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0x0, size - RISCV_ACLINT_DEFAULT_MTIME,
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2, size - RISCV_ACLINT_DEFAULT_MTIME,
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0x0, addr + RISCV_ACLINT_DEFAULT_MTIMECMP,
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2, addr + RISCV_ACLINT_DEFAULT_MTIMECMP,
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0x0, RISCV_ACLINT_DEFAULT_MTIME);
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2, RISCV_ACLINT_DEFAULT_MTIME);
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qemu_fdt_setprop(ms->fdt, name, "interrupts-extended",
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qemu_fdt_setprop(ms->fdt, name, "interrupts-extended",
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aclint_mtimer_cells, aclint_cells_size);
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aclint_mtimer_cells, aclint_cells_size);
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riscv_socket_fdt_write_id(ms, name, socket);
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riscv_socket_fdt_write_id(ms, name, socket);
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@ -428,8 +428,8 @@ static void create_fdt_socket_aclint(RISCVVirtState *s,
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qemu_fdt_add_subnode(ms->fdt, name);
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qemu_fdt_add_subnode(ms->fdt, name);
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qemu_fdt_setprop_string(ms->fdt, name, "compatible",
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qemu_fdt_setprop_string(ms->fdt, name, "compatible",
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"riscv,aclint-sswi");
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"riscv,aclint-sswi");
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qemu_fdt_setprop_cells(ms->fdt, name, "reg",
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qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
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0x0, addr, 0x0, s->memmap[VIRT_ACLINT_SSWI].size);
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2, addr, 2, s->memmap[VIRT_ACLINT_SSWI].size);
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qemu_fdt_setprop(ms->fdt, name, "interrupts-extended",
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qemu_fdt_setprop(ms->fdt, name, "interrupts-extended",
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aclint_sswi_cells, aclint_cells_size);
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aclint_sswi_cells, aclint_cells_size);
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qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0);
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