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hw/riscv: microchip_pfsoc: Rework documentation
Mention that running the HSS no longer works. Document the changed boot options. Reorder documentation blocks. Update URLs. Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250319061342.26435-7-sebastian.huber@embedded-brains.de> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Sebastian Huber
Alistair Francis
parent
e40b75fe5c
commit
dd07ab1121
1 changed files with 44 additions and 82 deletions
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@ -5,10 +5,10 @@ Microchip PolarFire SoC Icicle Kit integrates a PolarFire SoC, with one
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SiFive's E51 plus four U54 cores and many on-chip peripherals and an FPGA.
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SiFive's E51 plus four U54 cores and many on-chip peripherals and an FPGA.
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For more details about Microchip PolarFire SoC, please see:
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For more details about Microchip PolarFire SoC, please see:
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https://www.microsemi.com/product-directory/soc-fpgas/5498-polarfire-soc-fpga
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https://www.microchip.com/en-us/products/fpgas-and-plds/system-on-chip-fpgas/polarfire-soc-fpgas
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The Icicle Kit board information can be found here:
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The Icicle Kit board information can be found here:
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https://www.microsemi.com/existing-parts/parts/152514
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https://www.microchip.com/en-us/development-tool/mpfs-icicle-kit-es
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Supported devices
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Supported devices
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-----------------
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-----------------
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@ -26,95 +26,48 @@ The ``microchip-icicle-kit`` machine supports the following devices:
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* 2 GEM Ethernet controllers
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* 2 GEM Ethernet controllers
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* 1 SDHC storage controller
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* 1 SDHC storage controller
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The memory is set to 1537 MiB by default. A sanity check on RAM size is
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performed in the machine init routine to prompt user to increase the RAM size
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to > 1537 MiB when less than 1537 MiB RAM is detected.
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Boot options
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Boot options
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------------
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------------
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The ``microchip-icicle-kit`` machine can start using the standard -bios
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The ``microchip-icicle-kit`` machine provides some options to run a firmware
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functionality for loading its BIOS image, aka Hart Software Services (HSS_).
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(BIOS) or a kernel image. QEMU follows below truth table to select the
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HSS loads the second stage bootloader U-Boot from an SD card. Then a kernel
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firmware:
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can be loaded from U-Boot. It also supports direct kernel booting via the
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-kernel option along with the device tree blob via -dtb. When direct kernel
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boot is used, the OpenSBI fw_dynamic BIOS image is used to boot a payload
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like U-Boot or OS kernel directly.
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The user provided DTB should have the following requirements:
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============= =========== ======================================
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-bios -kernel firmware
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* The /cpus node should contain at least one subnode for E51 and the number
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============= =========== ======================================
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of subnodes should match QEMU's ``-smp`` option
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none N this is an error
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* The /memory reg size should match QEMU’s selected ram_size via ``-m``
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none Y the kernel image
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* Should contain a node for the CLINT device with a compatible string
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NULL, default N hss.bin
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"riscv,clint0"
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NULL, default Y opensbi-riscv64-generic-fw_dynamic.bin
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other don't care the BIOS image
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QEMU follows below truth table to select which payload to execute:
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============= =========== ======================================
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===== ========== ========== =======
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-bios -kernel -dtb payload
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===== ========== ========== =======
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N N don't care HSS
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Y don't care don't care HSS
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N Y Y kernel
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===== ========== ========== =======
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The memory is set to 1537 MiB by default which is the minimum required high
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memory size by HSS. A sanity check on ram size is performed in the machine
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init routine to prompt user to increase the RAM size to > 1537 MiB when less
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than 1537 MiB ram is detected.
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Running HSS
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-----------
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HSS 2020.12 release is tested at the time of writing. To build an HSS image
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that can be booted by the ``microchip-icicle-kit`` machine, type the following
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in the HSS source tree:
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.. code-block:: bash
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$ export CROSS_COMPILE=riscv64-linux-
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$ cp boards/mpfs-icicle-kit-es/def_config .config
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$ make BOARD=mpfs-icicle-kit-es
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Download the official SD card image released by Microchip and prepare it for
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QEMU usage:
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.. code-block:: bash
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$ wget ftp://ftpsoc.microsemi.com/outgoing/core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz
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$ gunzip core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz
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$ qemu-img resize core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic 4G
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Then we can boot the machine by:
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.. code-block:: bash
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$ qemu-system-riscv64 -M microchip-icicle-kit -smp 5 \
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-bios path/to/hss.bin -sd path/to/sdcard.img \
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-nic user,model=cadence_gem \
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-nic tap,ifname=tap,model=cadence_gem,script=no \
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-display none -serial stdio \
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-chardev socket,id=serial1,path=serial1.sock,server=on,wait=on \
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-serial chardev:serial1
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With above command line, current terminal session will be used for the first
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serial port. Open another terminal window, and use ``minicom`` to connect the
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second serial port.
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.. code-block:: bash
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$ minicom -D unix\#serial1.sock
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HSS output is on the first serial port (stdio) and U-Boot outputs on the
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second serial port. U-Boot will automatically load the Linux kernel from
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the SD card image.
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Direct Kernel Boot
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Direct Kernel Boot
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------------------
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------------------
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Sometimes we just want to test booting a new kernel, and transforming the
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Use the ``-kernel`` option to directly run a kernel image. When a direct
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kernel image to the format required by the HSS bootflow is tedious. We can
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kernel boot is requested, a device tree blob may be specified via the ``-dtb``
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use '-kernel' for direct kernel booting just like other RISC-V machines do.
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option. Unlike other QEMU machines, this machine does not generate a device
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tree for the kernel. It shall be provided by the user. The user provided DTB
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should meet the following requirements:
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In this mode, the OpenSBI fw_dynamic BIOS image for 'generic' platform is
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* The ``/cpus`` node should contain at least one subnode for E51 and the number
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used to boot an S-mode payload like U-Boot or OS kernel directly.
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of subnodes should match QEMU's ``-smp`` option.
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* The ``/memory`` reg size should match QEMU’s selected RAM size via the ``-m``
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option.
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* It should contain a node for the CLINT device with a compatible string
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"riscv,clint0".
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When ``-bios`` is not specified or set to ``default``, the OpenSBI
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``fw_dynamic`` BIOS image for the ``generic`` platform is used to boot an
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S-mode payload like U-Boot or OS kernel directly.
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For example, the following commands show building a U-Boot image from U-Boot
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For example, the following commands show building a U-Boot image from U-Boot
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mainline v2021.07 for the Microchip Icicle Kit board:
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mainline v2021.07 for the Microchip Icicle Kit board:
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@ -146,4 +99,13 @@ CAVEATS:
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``u-boot.bin`` has to be used which does contain one. To use the ELF image,
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``u-boot.bin`` has to be used which does contain one. To use the ELF image,
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we need to change to CONFIG_OF_EMBED or CONFIG_OF_PRIOR_STAGE.
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we need to change to CONFIG_OF_EMBED or CONFIG_OF_PRIOR_STAGE.
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Running HSS
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-----------
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The machine ``microchip-icicle-kit`` used to run the Hart Software Services
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(HSS_), however, the HSS development progressed and the QEMU machine
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implementation lacks behind. Currently, running the HSS no longer works.
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There is missing support in the clock and memory controller devices. In
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particular, reading from the SD card does not work.
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.. _HSS: https://github.com/polarfire-soc/hart-software-services
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.. _HSS: https://github.com/polarfire-soc/hart-software-services
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