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pcie: Add a helper to declare the PRI capability for a pcie device
Signed-off-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Message-Id: <20250520071823.764266-5-clement.mathieu--drif@eviden.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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3 changed files with 33 additions and 1 deletions
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@ -1240,6 +1240,32 @@ void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width,
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dev->exp.pasid_cap = offset;
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}
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/* PRI */
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void pcie_pri_init(PCIDevice *dev, uint16_t offset, uint32_t outstanding_pr_cap,
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bool prg_response_pasid_req)
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{
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static const uint16_t control_reg_rw_mask = 0x3;
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static const uint16_t status_reg_rw1_mask = 0x3;
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static const uint32_t pr_alloc_reg_rw_mask = 0xffffffff;
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uint16_t status_reg;
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status_reg = prg_response_pasid_req ? PCI_PRI_STATUS_PASID : 0;
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status_reg |= PCI_PRI_STATUS_STOPPED; /* Stopped by default */
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pcie_add_capability(dev, PCI_EXT_CAP_ID_PRI, PCI_PRI_VER, offset,
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PCI_EXT_CAP_PRI_SIZEOF);
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/* Disabled by default */
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pci_set_word(dev->config + offset + PCI_PRI_STATUS, status_reg);
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pci_set_long(dev->config + offset + PCI_PRI_MAX_REQ, outstanding_pr_cap);
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pci_set_word(dev->wmask + offset + PCI_PRI_CTRL, control_reg_rw_mask);
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pci_set_word(dev->w1cmask + offset + PCI_PRI_STATUS, status_reg_rw1_mask);
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pci_set_long(dev->wmask + offset + PCI_PRI_ALLOC_REQ, pr_alloc_reg_rw_mask);
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dev->exp.pri_cap = offset;
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}
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bool pcie_pasid_enabled(const PCIDevice *dev)
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{
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if (!pci_is_express(dev) || !dev->exp.pasid_cap) {
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