motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 00:03:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/arm: Add the SME ZA storage to CPUARMState

Browse source 
Place this late in the resettable section of the structure,
to keep the most common element offsets from being > 64k.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220620175235.60881-10-richard.henderson@linaro.org
[PMM: expanded comment on zarray[] format]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-20 10:51:53 -07:00 • committed by Peter Maydell
parent a3637e8882
commit dc993a01a7
2 changed files with 56 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

22
target/arm/cpu.h
View file

@ -694,6 +694,28 @@ typedef struct CPUArchState {
} keys;
uint64_t scxtnum_el[4];
/*
* SME ZA storage -- 256 x 256 byte array, with bytes in host word order,
* as we do with vfp.zregs[]. This corresponds to the architectural ZA
* array, where ZA[N] is in the least-significant bytes of env->zarray[N].
* When SVL is less than the architectural maximum, the accessible
* storage is restricted, such that if the SVL is X bytes the guest can
* see only the bottom X elements of zarray[], and only the least
* significant X bytes of each element of the array. (In other words,
* the observable part is always square.)
*
* The ZA storage can also be considered as a set of square tiles of
* elements of different sizes. The mapping from tiles to the ZA array
* is architecturally defined, such that for tiles of elements of esz
* bytes, the Nth row (or "horizontal slice") of tile T is in
* ZA[T + N * esz]. Note that this means that each tile is not contiguous
* in the ZA storage, because its rows are striped through the ZA array.
*
* Because this is so large, keep this toward the end of the reset area,
* to keep the offsets into the rest of the structure smaller.
*/
ARMVectorReg zarray[ARM_MAX_VQ * 16];
#endif
#if defined(CONFIG_USER_ONLY)