mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 01:33:56 -06:00
* rust: support migration of HPET device
* target/i386/hvf: fix compilation errors * target/i386/tcg: fix some interrupt shadow cases * hw/char/serial: remove unused prog_if compat property * rust: centralize config in workspace root * monitor: fix race on exiting QEMU -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmgVQzkUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOR8Af/Tke7kRZQyvoKURaKpVOBgP91fTQu IKwmX1OYe9JMPBwZV5g/++2HSaAddDzkFq90gmgTY+hpvRE3kDWOA86QtDRP4LKa Oq3yW48yrFiRZBAxERgRxRCsEvzlPC3cAEqCQd4fTL+cW6NVorbj4x/tQcALb47V cgXXVp59TW4lJk7nJUjd0mCFK1qEoIbZuuBgMn32K+fpBV/UghcoImT2giMeM24Y WW3olrLA9UN2fh5da7923WUvA9mSjnE0Yfdk6eKC3nCzlgMKktofwKHilm0tA6xA 7sJbwYTDSB9QxgnNw3WvAFAOMapJmedaSNorZdmcxCss7ed0s8hV8am9vQ== =LFS/ -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * rust: support migration of HPET device * target/i386/hvf: fix compilation errors * target/i386/tcg: fix some interrupt shadow cases * hw/char/serial: remove unused prog_if compat property * rust: centralize config in workspace root * monitor: fix race on exiting QEMU # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmgVQzkUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOR8Af/Tke7kRZQyvoKURaKpVOBgP91fTQu # IKwmX1OYe9JMPBwZV5g/++2HSaAddDzkFq90gmgTY+hpvRE3kDWOA86QtDRP4LKa # Oq3yW48yrFiRZBAxERgRxRCsEvzlPC3cAEqCQd4fTL+cW6NVorbj4x/tQcALb47V # cgXXVp59TW4lJk7nJUjd0mCFK1qEoIbZuuBgMn32K+fpBV/UghcoImT2giMeM24Y # WW3olrLA9UN2fh5da7923WUvA9mSjnE0Yfdk6eKC3nCzlgMKktofwKHilm0tA6xA # 7sJbwYTDSB9QxgnNw3WvAFAOMapJmedaSNorZdmcxCss7ed0s8hV8am9vQ== # =LFS/ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 02 May 2025 18:12:09 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: monitor: don't wake up qmp_dispatcher_co coroutine upon cleanup rust: centralize config in workspace root hw/char/serial: Remove unused prog_if compat property target/i386: do not block singlestep for STI target/i386: do not trigger IRQ shadow for LSS target/i386/hvf: fix a compilation error target/i386/emulate: remove rflags leftovers rust/hpet: Support migration rust/timer: Define NANOSECONDS_PER_SECOND binding as u64 rust/vmstate_test: Test varray with num field wrapped in BqlCell rust: assertions: Support index field wrapped in BqlCell vmstate: support varray for vmstate_clock! rust/vmstate: Add support for field_exists checks Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
dc1ed8f256
19 changed files with 307 additions and 127 deletions
|
@ -51,7 +51,6 @@ typedef struct PCIDivaSerialState {
|
|||
SerialState state[PCI_SERIAL_MAX_PORTS];
|
||||
uint32_t level[PCI_SERIAL_MAX_PORTS];
|
||||
qemu_irq *irqs;
|
||||
uint8_t prog_if;
|
||||
bool disable;
|
||||
} PCIDivaSerialState;
|
||||
|
||||
|
@ -124,8 +123,8 @@ static void diva_pci_realize(PCIDevice *dev, Error **errp)
|
|||
size_t i, offset = 0;
|
||||
size_t portmask = di.omask;
|
||||
|
||||
pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
|
||||
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
|
||||
pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
|
||||
pci->dev.config[PCI_INTERRUPT_PIN] = 1;
|
||||
memory_region_init(&pci->membar, OBJECT(pci), "serial_ports", 4096);
|
||||
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &pci->membar);
|
||||
pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, di.nports);
|
||||
|
@ -178,7 +177,6 @@ static const Property diva_serial_properties[] = {
|
|||
DEFINE_PROP_CHR("chardev2", PCIDivaSerialState, state[1].chr),
|
||||
DEFINE_PROP_CHR("chardev3", PCIDivaSerialState, state[2].chr),
|
||||
DEFINE_PROP_CHR("chardev4", PCIDivaSerialState, state[3].chr),
|
||||
DEFINE_PROP_UINT8("prog_if", PCIDivaSerialState, prog_if, 0x02),
|
||||
DEFINE_PROP_UINT32("subvendor", PCIDivaSerialState, subvendor,
|
||||
PCI_DEVICE_ID_HP_DIVA_TOSCA1),
|
||||
};
|
||||
|
|
|
@ -46,7 +46,6 @@ typedef struct PCIMultiSerialState {
|
|||
SerialState state[PCI_SERIAL_MAX_PORTS];
|
||||
uint32_t level[PCI_SERIAL_MAX_PORTS];
|
||||
IRQState irqs[PCI_SERIAL_MAX_PORTS];
|
||||
uint8_t prog_if;
|
||||
} PCIMultiSerialState;
|
||||
|
||||
static void multi_serial_pci_exit(PCIDevice *dev)
|
||||
|
@ -97,8 +96,8 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp)
|
|||
SerialState *s;
|
||||
size_t i, nports = multi_serial_get_port_count(pc);
|
||||
|
||||
pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
|
||||
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
|
||||
pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
|
||||
pci->dev.config[PCI_INTERRUPT_PIN] = 1;
|
||||
memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
|
||||
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
|
||||
|
||||
|
@ -133,7 +132,6 @@ static const VMStateDescription vmstate_pci_multi_serial = {
|
|||
static const Property multi_2x_serial_pci_properties[] = {
|
||||
DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
|
||||
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
|
||||
DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
|
||||
};
|
||||
|
||||
static const Property multi_4x_serial_pci_properties[] = {
|
||||
|
@ -141,7 +139,6 @@ static const Property multi_4x_serial_pci_properties[] = {
|
|||
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
|
||||
DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
|
||||
DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
|
||||
DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
|
||||
};
|
||||
|
||||
static void multi_2x_serial_pci_class_initfn(ObjectClass *klass,
|
||||
|
|
|
@ -38,7 +38,6 @@
|
|||
struct PCISerialState {
|
||||
PCIDevice dev;
|
||||
SerialState state;
|
||||
uint8_t prog_if;
|
||||
};
|
||||
|
||||
#define TYPE_PCI_SERIAL "pci-serial"
|
||||
|
@ -53,8 +52,8 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp)
|
|||
return;
|
||||
}
|
||||
|
||||
pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
|
||||
pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
|
||||
pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
|
||||
pci->dev.config[PCI_INTERRUPT_PIN] = 1;
|
||||
s->irq = pci_allocate_irq(&pci->dev);
|
||||
|
||||
memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8);
|
||||
|
@ -81,10 +80,6 @@ static const VMStateDescription vmstate_pci_serial = {
|
|||
}
|
||||
};
|
||||
|
||||
static const Property serial_pci_properties[] = {
|
||||
DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
|
||||
};
|
||||
|
||||
static void serial_pci_class_initfn(ObjectClass *klass, const void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(klass);
|
||||
|
@ -96,7 +91,6 @@ static void serial_pci_class_initfn(ObjectClass *klass, const void *data)
|
|||
pc->revision = 1;
|
||||
pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
|
||||
dc->vmsd = &vmstate_pci_serial;
|
||||
device_class_set_props(dc, serial_pci_properties);
|
||||
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
|
||||
}
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue