motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 10:34:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

hw/nvme: add NPDAL/NPDGL

Browse source 
Add the NPDGL and NPDAL fields to support large alignment and
granularities.

Signed-off-by: Ayush Mishra <ayush.m55@samsung.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Link: https://lore.kernel.org/r/20241001012833.3551820-1-ayush.m55@samsung.com
[k.jensen: renamed the enum values]
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
This commit is contained in:
Ayush Mishra 2024-10-01 06:58:33 +05:30 • committed by Klaus Jensen
parent 79e490058f
commit dbaa2936b3
2 changed files with 20 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

5
hw/nvme/ns.c
View file

@ -30,6 +30,7 @@
void nvme_ns_init_format(NvmeNamespace *ns) void nvme_ns_init_format(NvmeNamespace *ns)
{ {
NvmeIdNs *id_ns = &ns->id_ns; NvmeIdNs *id_ns = &ns->id_ns;
NvmeIdNsNvm *id_ns_nvm = &ns->id_ns_nvm;
BlockDriverInfo bdi; BlockDriverInfo bdi;
int npdg, ret; int npdg, ret;
int64_t nlbas; int64_t nlbas;
@ -55,6 +56,8 @@ void nvme_ns_init_format(NvmeNamespace *ns)
} }
id_ns->npda = id_ns->npdg = npdg - 1; id_ns->npda = id_ns->npdg = npdg - 1;
id_ns_nvm->npdal = npdg;
id_ns_nvm->npdgl = npdg;
} }
static int nvme_ns_init(NvmeNamespace *ns, Error **errp) static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
@ -73,7 +76,7 @@ static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
ns->id_ns.dlfeat = 0x1; ns->id_ns.dlfeat = 0x1;
/* support DULBE and I/O optimization fields */ /* support DULBE and I/O optimization fields */
id_ns->nsfeat |= (0x4 | 0x10); id_ns->nsfeat |= (NVME_ID_NS_NSFEAT_DAE | NVME_ID_NS_NSFEAT_OPTPERF_ALL);
if (ns->params.shared) { if (ns->params.shared) {
id_ns->nmic |= NVME_ID_NS_IND_NMIC_SHRNS; id_ns->nmic |= NVME_ID_NS_IND_NMIC_SHRNS;

17
include/block/nvme.h
View file

@ -1418,7 +1418,12 @@ typedef struct QEMU_PACKED NvmeIdNsNvm {
uint8_t pic; uint8_t pic;
uint8_t rsvd9[3]; uint8_t rsvd9[3];
uint32_t elbaf[NVME_MAX_NLBAF]; uint32_t elbaf[NVME_MAX_NLBAF];
uint8_t rsvd268[3828]; uint32_t npdgl;
uint32_t nprg;
uint32_t npra;
uint32_t nors;
uint32_t npdal;
uint8_t rsvd288[3808];
} NvmeIdNsNvm; } NvmeIdNsNvm;
typedef struct QEMU_PACKED NvmeIdNsInd { typedef struct QEMU_PACKED NvmeIdNsInd {
@ -1536,6 +1541,16 @@ enum NvmeIdNsMc {
NVME_ID_NS_MC_SEPARATE = 1 << 1, NVME_ID_NS_MC_SEPARATE = 1 << 1,
}; };
enum NvmeIdNsNsfeat {
NVME_ID_NS_NSFEAT_THINP = 1 << 0,
NVME_ID_NS_NSFEAT_NSABPNS = 1 << 1,
NVME_ID_NS_NSFEAT_DAE = 1 << 2,
NVME_ID_NS_NSFEAT_UIDREUSE = 1 << 3,
NVME_ID_NS_NSFEAT_OPTPERF_ALL = 3 << 4,
NVME_ID_NS_NSFEAT_MAM = 1 << 6,
NVME_ID_NS_NSFEAT_OPTRPERF = 1 << 7,
};
#define NVME_ID_NS_DPS_TYPE(dps) (dps & NVME_ID_NS_DPS_TYPE_MASK) #define NVME_ID_NS_DPS_TYPE(dps) (dps & NVME_ID_NS_DPS_TYPE_MASK)
enum NvmePIFormat { enum NvmePIFormat {