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sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2

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This is the same transformation as in the previous commit, except
sysbus_init_child_obj() and realize are too separated for the commit's
Coccinelle script to handle, typically because sysbus_init_child_obj()
is in a device's instance_init() method, and the matching realize is
in its realize() method.

Perhaps a Coccinelle wizard could make it transform that pattern, but
I'm just a bungler, and the best I can do is transforming the two
separate parts separately:

    @@
    expression errp;
    expression child;
    symbol true;
    @@
    -    object_property_set_bool(OBJECT(child), true, "realized", errp);
    +    sysbus_realize(SYS_BUS_DEVICE(child), errp);
    // only correct with a matching sysbus_init_child_obj() transformation!

    @@
    expression errp;
    expression child;
    symbol true;
    @@
    -    object_property_set_bool(child, true, "realized", errp);
    +    sysbus_realize(SYS_BUS_DEVICE(child), errp);
    // only correct with a matching sysbus_init_child_obj() transformation!

    @@
    expression child;
    @@
    -    qdev_init_nofail(DEVICE(child));
    +    sysbus_realize(SYS_BUS_DEVICE(child), &error_fatal);
    // only correct with a matching sysbus_init_child_obj() transformation!

    @@
    expression child;
    expression dev;
    @@
         dev = DEVICE(child);
         ...
    -    qdev_init_nofail(dev);
    +    sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
    // only correct with a matching sysbus_init_child_obj() transformation!

    @@
    expression child;
    identifier dev;
    @@
         DeviceState *dev = DEVICE(child);
         ...
    -    qdev_init_nofail(dev);
    +    sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
    // only correct with a matching sysbus_init_child_obj() transformation!

    @@
    expression parent, name, size, type;
    expression child;
    symbol true;
    @@
    -    sysbus_init_child_obj(parent, name, child, size, type);
    +    sysbus_init_child_XXX(parent, name, child, size, type);

    @@
    expression parent, propname, type;
    expression child;
    @@
    -    sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
    +    object_initialize_child(parent, propname, child, type)

    @@
    expression parent, propname, type;
    expression child;
    @@
    -    sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
    +    object_initialize_child(parent, propname, &child, type)

This script is *unsound*: we need to manually verify init and realize
conversions are properly paired.

This commit has only the pairs where object_initialize_child()'s
@child and sysbus_realize()'s @dev argument text match exactly within
the same source file.

Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c.  Worked around by temporarily renaming the macro for
the spatch run.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-49-armbru@redhat.com>
This commit is contained in:
Markus Armbruster 2020-06-10 07:32:37 +02:00
parent 0074fce61f
commit db873cc5d1
31 changed files with 463 additions and 661 deletions
Download patch file Download diff file Expand all files Collapse all files

13
hw/riscv/sifive_e.c
View file

@ -147,13 +147,11 @@ static void riscv_sifive_e_soc_init(Object *obj)
MachineState *ms = MACHINE(qdev_get_machine());
SiFiveESoCState *s = RISCV_E_SOC(obj);
sysbus_init_child_obj(obj, "cpus", &s->cpus,
sizeof(s->cpus), TYPE_RISCV_HART_ARRAY);
object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY);
object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
&error_abort);
sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0",
&s->gpio, sizeof(s->gpio),
TYPE_SIFIVE_GPIO);
object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio,
TYPE_SIFIVE_GPIO);
}
static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
@ -167,8 +165,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type",
&error_abort);
object_property_set_bool(OBJECT(&s->cpus), true, "realized",
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort);
/* Mask ROM */
memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom",
@ -197,7 +194,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
/* GPIO */
object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err);
sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err);
if (err) {
error_propagate(errp, err);
return;