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Move QOM typedefs and add missing includes

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Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

 $ ./scripts/codeconverter/converter.py -i \
   --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

 $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
    $(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Eduardo Habkost 2020-09-03 16:43:22 -04:00
parent 1c8eef0227
commit db1015e92e
796 changed files with 3378 additions and 1823 deletions
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11
target/riscv/cpu.h
View file

@ -24,6 +24,7 @@
#include "hw/registerfields.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
#include "qom/object.h"
#define TCG_GUEST_DEFAULT_MO 0
@ -231,6 +232,8 @@ struct CPURISCVState {
QEMUTimer *timer; /* Internal timer */
};
typedef struct RISCVCPU RISCVCPU;
typedef struct RISCVCPUClass RISCVCPUClass;
#define RISCV_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(RISCVCPUClass, (klass), TYPE_RISCV_CPU)
#define RISCV_CPU(obj) \
@ -245,13 +248,13 @@ struct CPURISCVState {
*
* A RISCV CPU model.
*/
typedef struct RISCVCPUClass {
struct RISCVCPUClass {
/*< private >*/
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
DeviceReset parent_reset;
} RISCVCPUClass;
};
/**
* RISCVCPU:
@ -259,7 +262,7 @@ typedef struct RISCVCPUClass {
*
* A RISCV CPU.
*/
typedef struct RISCVCPU {
struct RISCVCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
@ -292,7 +295,7 @@ typedef struct RISCVCPU {
bool mmu;
bool pmp;
} cfg;
} RISCVCPU;
};
static inline int riscv_has_ext(CPURISCVState *env, target_ulong ext)
{