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hw/misc: Add support for NPCM8XX GCR

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20250219184609.1839281-8-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Hao Wu 2025-02-19 10:45:58 -08:00 • committed by Peter Maydell
parent 8ca2021b9d
commit d9ffb75f2a
2 changed files with 134 additions and 5 deletions
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6
include/hw/misc/npcm_gcr.h
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@ -1,5 +1,5 @@
/*
* Nuvoton NPCM7xx System Global Control Registers.
* Nuvoton NPCM7xx/8xx System Global Control Registers.
*
* Copyright 2020 Google LLC
*
@ -54,8 +54,9 @@
* Number of registers in our device state structure. Don't change this without
* incrementing the version_id in the vmstate.
*/
#define NPCM_GCR_MAX_NR_REGS NPCM7XX_GCR_NR_REGS
#define NPCM_GCR_MAX_NR_REGS NPCM8XX_GCR_NR_REGS
#define NPCM7XX_GCR_NR_REGS (0x148 / sizeof(uint32_t))
#define NPCM8XX_GCR_NR_REGS (0xf80 / sizeof(uint32_t))
typedef struct NPCMGCRState {
SysBusDevice parent;
@ -78,6 +79,7 @@ typedef struct NPCMGCRClass {
#define TYPE_NPCM_GCR "npcm-gcr"
#define TYPE_NPCM7XX_GCR "npcm7xx-gcr"
#define TYPE_NPCM8XX_GCR "npcm8xx-gcr"
OBJECT_DECLARE_TYPE(NPCMGCRState, NPCMGCRClass, NPCM_GCR)
#endif /* NPCM_GCR_H */