motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-03 07:43:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target-i386: add SSE4a instruction support

Browse source 
This adds support for the AMD Phenom/Barcelona's SSE4a instructions.
Those include insertq and extrq, which are doing shift and mask on
XMM registers, in two versions (immediate shift/length values and
stored in another XMM register).
Additionally it implements movntss, movntsd, which are scalar
non-temporal stores (avoiding cache trashing). These are implemented
as normal stores, though.
SSE4a is guarded by the SSE4A CPUID bit (Fn8000_0001:ECX[6]).

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Andre Przywara 2009-09-19 00:30:48 +02:00 • committed by Aurelien Jarno
parent ccd59d09a9
commit d9f4bb27db
3 changed files with 85 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

44
target-i386/ops_sse.h
View file

@ -802,6 +802,50 @@ void helper_rcpss(XMMReg *d, XMMReg *s)
d->XMM_S(0) = approx_rcp(s->XMM_S(0));
}
static inline uint64_t helper_extrq(uint64_t src, int shift, int len)
{
uint64_t mask;
if (len == 0) {
mask = ~0LL;
} else {
mask = (1ULL << len) - 1;
}
return (src >> shift) & mask;
}
void helper_extrq_r(XMMReg *d, XMMReg *s)
{
d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), s->XMM_B(1), s->XMM_B(0));
}
void helper_extrq_i(XMMReg *d, int index, int length)
{
d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), index, length);
}
static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
{
uint64_t mask;
if (len == 0) {
mask = ~0ULL;
} else {
mask = (1ULL << len) - 1;
}
return (src & ~(mask << shift)) | ((src & mask) << shift);
}
void helper_insertq_r(XMMReg *d, XMMReg *s)
{
d->XMM_Q(0) = helper_insertq(s->XMM_Q(0), s->XMM_B(9), s->XMM_B(8));
}
void helper_insertq_i(XMMReg *d, int index, int length)
{
d->XMM_Q(0) = helper_insertq(d->XMM_Q(0), index, length);
}
void helper_haddps(XMMReg *d, XMMReg *s)
{
XMMReg r;