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target-arm: Get MMU index information correct for A64 code

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Emit the correct MMU index information for loads and stores from
A64 code, rather than hardwiring it to "always kernel mode",
by storing the exception level in the TB flags, and make
cpu_mmu_index() return the right answer when the CPU is in
AArch64 mode.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
This commit is contained in:
Peter Maydell 2014-02-26 17:20:05 +00:00
parent cd5c11b84b
commit d9ea7d290b
2 changed files with 9 additions and 4 deletions
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2
target-arm/translate-a64.c
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@ -9013,7 +9013,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
dc->condexec_mask = 0;
dc->condexec_cond = 0;
#if !defined(CONFIG_USER_ONLY)
dc->user = 0;
dc->user = (ARM_TBFLAG_AA64_EL(tb->flags) == 0);
#endif
dc->vfp_enabled = 0;
dc->vec_len = 0;