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target/ppc: Add helpers for fadds, fsubs, fdivs

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Use float64r32_{add,sub,div}.  Fixes a double-rounding issue with
performing the compuation in float64 and then rounding afterward.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-31-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Richard Henderson 2021-12-17 17:57:16 +01:00 • committed by Cédric Le Goater
parent 41ae890d08
commit d9e792a1c1
3 changed files with 47 additions and 7 deletions
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11
target/ppc/translate/fp-impl.c.inc
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@ -68,7 +68,7 @@ static void gen_f##name(DisasContext *ctx) \
_GEN_FLOAT_ACB(name, 0x3F, op2, set_fprf, type); \
_GEN_FLOAT_ACB(name##s, 0x3B, op2, set_fprf, type);
#define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \
#define _GEN_FLOAT_AB(name, op1, op2, inval, set_fprf, type) \
static void gen_f##name(DisasContext *ctx) \
{ \
TCGv_i64 t0; \
@ -84,10 +84,7 @@ static void gen_f##name(DisasContext *ctx) \
gen_reset_fpstatus(); \
get_fpr(t0, rA(ctx->opcode)); \
get_fpr(t1, rB(ctx->opcode)); \
gen_helper_f##op(t2, cpu_env, t0, t1); \
if (isfloat) { \
gen_helper_frsp(t2, cpu_env, t2); \
} \
gen_helper_f##name(t2, cpu_env, t0, t1); \
set_fpr(rD(ctx->opcode), t2); \
if (set_fprf) { \
gen_compute_fprf_float64(t2); \
@ -100,8 +97,8 @@ static void gen_f##name(DisasContext *ctx) \
tcg_temp_free_i64(t2); \
}
#define GEN_FLOAT_AB(name, op2, inval, set_fprf, type) \
_GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type); \
_GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type);
_GEN_FLOAT_AB(name, 0x3F, op2, inval, set_fprf, type); \
_GEN_FLOAT_AB(name##s, 0x3B, op2, inval, set_fprf, type);
#define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \
static void gen_f##name(DisasContext *ctx) \