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target/riscv: Split out the vill from vtype

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We need not specially process vtype when XLEN changes.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220120122050.41546-16-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
LIU Zhiwei 2022-01-20 20:20:42 +08:00 • committed by Alistair Francis
parent 4208dc7e9e
commit d96a271a8d
5 changed files with 19 additions and 6 deletions
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13
target/riscv/csr.c
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@ -283,7 +283,18 @@ static RISCVException write_fcsr(CPURISCVState *env, int csrno,
static RISCVException read_vtype(CPURISCVState *env, int csrno,
target_ulong *val)
{
*val = env->vtype;
uint64_t vill;
switch (env->xl) {
case MXL_RV32:
vill = (uint32_t)env->vill << 31;
break;
case MXL_RV64:
vill = (uint64_t)env->vill << 63;
break;
default:
g_assert_not_reached();
}
*val = (target_ulong)vill | env->vtype;
return RISCV_EXCP_NONE;
}