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aspeed: add a per SoC mapping for the memory space

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This will simplify the definition of new SoCs, like the AST2600 which
should use a slightly different address space and have a different set
of controllers.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190618165311.27066-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2019-07-01 17:26:15 +01:00 • committed by Peter Maydell
parent b456b1132e
commit d783d1fe58
3 changed files with 78 additions and 51 deletions
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4
include/hw/arm/aspeed_soc.h
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@ -49,14 +49,13 @@ typedef struct AspeedSoCInfo {
const char *name;
const char *cpu_type;
uint32_t silicon_rev;
hwaddr sdram_base;
uint64_t sram_size;
int spis_num;
const hwaddr *spi_bases;
const char *fmc_typename;
const char **spi_typename;
int wdts_num;
const int *irqmap;
const hwaddr *memmap;
} AspeedSoCInfo;
typedef struct AspeedSoCClass {
@ -102,6 +101,7 @@ enum {
ASPEED_I2C,
ASPEED_ETH1,
ASPEED_ETH2,
ASPEED_SDRAM,
};
#endif /* ASPEED_SOC_H */