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cpu: Move current_tb field to CPUState
Explictly NULL it on CPU reset since it was located before breakpoints. Change vapic_report_tpr_access() argument to CPUState. This also resolves the use of void* for cpu.h independence. Change vAPIC patch_instruction() argument to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
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fcd7d0034b
commit
d77953b94f
10 changed files with 48 additions and 26 deletions
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@ -998,6 +998,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
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{
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TranslationBlock *tb, *tb_next, *saved_tb;
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CPUArchState *env = cpu_single_env;
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CPUState *cpu = NULL;
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tb_page_addr_t tb_start, tb_end;
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PageDesc *p;
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int n;
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@ -1020,6 +1021,9 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
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/* build code bitmap */
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build_page_bitmap(p);
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}
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if (env != NULL) {
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cpu = ENV_GET_CPU(env);
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}
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/* we remove all the TBs in the range [start, end[ */
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/* XXX: see if in some cases it could be faster to invalidate all
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@ -1066,14 +1070,14 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
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/* we need to do that to handle the case where a signal
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occurs while doing tb_phys_invalidate() */
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saved_tb = NULL;
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if (env) {
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saved_tb = env->current_tb;
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env->current_tb = NULL;
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if (cpu != NULL) {
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saved_tb = cpu->current_tb;
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cpu->current_tb = NULL;
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}
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tb_phys_invalidate(tb, -1);
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if (env) {
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env->current_tb = saved_tb;
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if (env->interrupt_request && env->current_tb) {
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if (cpu != NULL) {
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cpu->current_tb = saved_tb;
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if (env && env->interrupt_request && cpu->current_tb) {
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cpu_interrupt(env, env->interrupt_request);
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}
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}
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@ -1094,7 +1098,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
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/* we generate a block containing just the instruction
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modifying the memory. It will ensure that it cannot modify
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itself */
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env->current_tb = NULL;
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cpu->current_tb = NULL;
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tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);
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cpu_resume_from_signal(env, NULL);
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}
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@ -1142,6 +1146,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
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#ifdef TARGET_HAS_PRECISE_SMC
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TranslationBlock *current_tb = NULL;
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CPUArchState *env = cpu_single_env;
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CPUState *cpu = NULL;
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int current_tb_modified = 0;
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target_ulong current_pc = 0;
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target_ulong current_cs_base = 0;
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@ -1158,6 +1163,9 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
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if (tb && pc != 0) {
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current_tb = tb_find_pc(pc);
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}
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if (env != NULL) {
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cpu = ENV_GET_CPU(env);
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}
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#endif
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while (tb != NULL) {
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n = (uintptr_t)tb & 3;
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@ -1186,7 +1194,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
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/* we generate a block containing just the instruction
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modifying the memory. It will ensure that it cannot modify
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itself */
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env->current_tb = NULL;
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cpu->current_tb = NULL;
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tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);
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cpu_resume_from_signal(env, puc);
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}
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@ -1414,15 +1422,16 @@ void cpu_unlink_tb(CPUArchState *env)
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problem and hope the cpu will stop of its own accord. For userspace
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emulation this often isn't actually as bad as it sounds. Often
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signals are used primarily to interrupt blocking syscalls. */
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CPUState *cpu = ENV_GET_CPU(env);
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TranslationBlock *tb;
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static spinlock_t interrupt_lock = SPIN_LOCK_UNLOCKED;
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spin_lock(&interrupt_lock);
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tb = env->current_tb;
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tb = cpu->current_tb;
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/* if the cpu is currently executing code, we must unlink it and
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all the potentially executing TB */
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if (tb) {
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env->current_tb = NULL;
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cpu->current_tb = NULL;
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tb_reset_jump_recursive(tb);
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}
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spin_unlock(&interrupt_lock);
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