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target-mips: Add ASE DSP testcases

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Add MIPS ASE DSP testcases.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Jia Liu 2012-10-24 22:17:13 +08:00 • committed by Aurelien Jarno
parent af13ae03f8
commit d70080c4e3
487 changed files with 19151 additions and 0 deletions
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52
tests/tcg/mips/mips32-dsp/extrv_rs_w.c Normal file
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@ -0,0 +1,52 @@
#include<stdio.h>
#include<assert.h>
int main()
{
int rt, rs, ach, acl, dsp;
int result;
rs = 0x03;
ach = 0x05;
acl = 0xB4CB;
result = 0x7FFFFFFF;
__asm
("wrdsp %1, 0x01\n\t"
"mthi %3, $ac1\n\t"
"mtlo %4, $ac1\n\t"
"extrv_rs.w %0, $ac1, %2\n\t"
"rddsp %1\n\t"
: "=r"(rt), "+r"(dsp)
: "r"(rs), "r"(ach), "r"(acl)
);
dsp = (dsp >> 23) & 0x01;
assert(dsp == 1);
assert(result == rt);
/* Clear dspcontrol */
dsp = 0;
__asm
("wrdsp %0\n\t"
:
: "r"(dsp)
);
rs = 0x04;
ach = 0x01;
acl = 0xB4CB;
result = 0x10000B4D;
__asm
("wrdsp %1, 0x01\n\t"
"mthi %3, $ac1\n\t"
"mtlo %4, $ac1\n\t"
"extrv_rs.w %0, $ac1, %2\n\t"
"rddsp %1\n\t"
: "=r"(rt), "+r"(dsp)
: "r"(rs), "r"(ach), "r"(acl)
);
dsp = (dsp >> 23) & 0x01;
assert(dsp == 0);
assert(result == rt);
return 0;
}