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hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton

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Add the necessary files to add a simple RCC implementation with just
reads from and writes to registers. Also instantiate the RCC in the
STM32L4x5_SoC. It is needed for accurate emulation of all the SoC
clocks and timers.

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240303140643.81957-2-arnaud.minier@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Arnaud Minier 2024-03-03 15:06:36 +01:00 • committed by Peter Maydell
parent f576e0733c
commit d6b55a0fe9
11 changed files with 839 additions and 3 deletions
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2
include/hw/arm/stm32l4x5_soc.h
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@ -29,6 +29,7 @@
#include "hw/or-irq.h"
#include "hw/misc/stm32l4x5_syscfg.h"
#include "hw/misc/stm32l4x5_exti.h"
#include "hw/misc/stm32l4x5_rcc.h"
#include "qom/object.h"
#define TYPE_STM32L4X5_SOC "stm32l4x5-soc"
@ -47,6 +48,7 @@ struct Stm32l4x5SocState {
Stm32l4x5ExtiState exti;
OrIRQState exti_or_gates[NUM_EXTI_OR_GATES];
Stm32l4x5SyscfgState syscfg;
Stm32l4x5RccState rcc;
MemoryRegion sram1;
MemoryRegion sram2;