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i386: Update new x86_apicid parsing rules with die_offset support
In new sockets/dies/cores/threads model, the apicid of logical cpu could imply die level info of guest cpu topology thus x86_apicid_from_cpu_idx() need to be refactored with #dies value, so does apicid_*_offset(). To keep semantic compatibility, the legacy pkg_offset which helps to generate CPUIDs such as 0x3 for L3 cache should be mapping to die_offset. Signed-off-by: Like Xu <like.xu@linux.intel.com> Message-Id: <20190612084104.34984-5-like.xu@linux.intel.com> [ehabkost: squash unit test patch] Message-Id: <20190612084104.34984-6-like.xu@linux.intel.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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4 changed files with 124 additions and 76 deletions
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@ -28,74 +28,80 @@
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static void test_topo_bits(void)
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{
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/* simple tests for 1 thread per core, 1 core per socket */
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g_assert_cmpuint(apicid_smt_width(1, 1), ==, 0);
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g_assert_cmpuint(apicid_core_width(1, 1), ==, 0);
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/* simple tests for 1 thread per core, 1 core per die, 1 die per package */
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g_assert_cmpuint(apicid_smt_width(1, 1, 1), ==, 0);
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g_assert_cmpuint(apicid_core_width(1, 1, 1), ==, 0);
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g_assert_cmpuint(apicid_die_width(1, 1, 1), ==, 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 0), ==, 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1), ==, 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 2), ==, 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 3), ==, 3);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 0), ==, 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 1), ==, 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 2), ==, 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1, 3), ==, 3);
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/* Test field width calculation for multiple values
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*/
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g_assert_cmpuint(apicid_smt_width(1, 2), ==, 1);
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g_assert_cmpuint(apicid_smt_width(1, 3), ==, 2);
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g_assert_cmpuint(apicid_smt_width(1, 4), ==, 2);
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g_assert_cmpuint(apicid_smt_width(1, 1, 2), ==, 1);
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g_assert_cmpuint(apicid_smt_width(1, 1, 3), ==, 2);
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g_assert_cmpuint(apicid_smt_width(1, 1, 4), ==, 2);
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g_assert_cmpuint(apicid_smt_width(1, 14), ==, 4);
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g_assert_cmpuint(apicid_smt_width(1, 15), ==, 4);
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g_assert_cmpuint(apicid_smt_width(1, 16), ==, 4);
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g_assert_cmpuint(apicid_smt_width(1, 17), ==, 5);
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g_assert_cmpuint(apicid_smt_width(1, 1, 14), ==, 4);
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g_assert_cmpuint(apicid_smt_width(1, 1, 15), ==, 4);
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g_assert_cmpuint(apicid_smt_width(1, 1, 16), ==, 4);
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g_assert_cmpuint(apicid_smt_width(1, 1, 17), ==, 5);
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g_assert_cmpuint(apicid_core_width(30, 2), ==, 5);
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g_assert_cmpuint(apicid_core_width(31, 2), ==, 5);
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g_assert_cmpuint(apicid_core_width(32, 2), ==, 5);
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g_assert_cmpuint(apicid_core_width(33, 2), ==, 6);
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g_assert_cmpuint(apicid_core_width(1, 30, 2), ==, 5);
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g_assert_cmpuint(apicid_core_width(1, 31, 2), ==, 5);
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g_assert_cmpuint(apicid_core_width(1, 32, 2), ==, 5);
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g_assert_cmpuint(apicid_core_width(1, 33, 2), ==, 6);
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g_assert_cmpuint(apicid_die_width(1, 30, 2), ==, 0);
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g_assert_cmpuint(apicid_die_width(2, 30, 2), ==, 1);
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g_assert_cmpuint(apicid_die_width(3, 30, 2), ==, 2);
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g_assert_cmpuint(apicid_die_width(4, 30, 2), ==, 2);
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/* build a weird topology and see if IDs are calculated correctly
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*/
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/* This will use 2 bits for thread ID and 3 bits for core ID
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*/
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g_assert_cmpuint(apicid_smt_width(6, 3), ==, 2);
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g_assert_cmpuint(apicid_core_width(6, 3), ==, 3);
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g_assert_cmpuint(apicid_pkg_offset(6, 3), ==, 5);
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g_assert_cmpuint(apicid_smt_width(1, 6, 3), ==, 2);
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g_assert_cmpuint(apicid_core_offset(1, 6, 3), ==, 2);
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g_assert_cmpuint(apicid_die_offset(1, 6, 3), ==, 5);
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g_assert_cmpuint(apicid_pkg_offset(1, 6, 3), ==, 5);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 0), ==, 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 1), ==, 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 2), ==, 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 0), ==, 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1), ==, 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2), ==, 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 1 * 3 + 0), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1 * 3 + 0), ==,
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(1 << 2) | 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 1 * 3 + 1), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1 * 3 + 1), ==,
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(1 << 2) | 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 1 * 3 + 2), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 1 * 3 + 2), ==,
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(1 << 2) | 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 2 * 3 + 0), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2 * 3 + 0), ==,
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(2 << 2) | 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 2 * 3 + 1), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2 * 3 + 1), ==,
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(2 << 2) | 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 2 * 3 + 2), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 2 * 3 + 2), ==,
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(2 << 2) | 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 5 * 3 + 0), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 5 * 3 + 0), ==,
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(5 << 2) | 0);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 5 * 3 + 1), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 5 * 3 + 1), ==,
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(5 << 2) | 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 5 * 3 + 2), ==,
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3, 5 * 3 + 2), ==,
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(5 << 2) | 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 1 * 6 * 3 + 0 * 3 + 0), ==,
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(1 << 5));
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 1 * 6 * 3 + 1 * 3 + 1), ==,
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(1 << 5) | (1 << 2) | 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(6, 3, 3 * 6 * 3 + 5 * 3 + 2), ==,
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(3 << 5) | (5 << 2) | 2);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3,
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1 * 6 * 3 + 0 * 3 + 0), ==, (1 << 5));
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3,
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1 * 6 * 3 + 1 * 3 + 1), ==, (1 << 5) | (1 << 2) | 1);
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g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 6, 3,
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3 * 6 * 3 + 5 * 3 + 2), ==, (3 << 5) | (5 << 2) | 2);
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}
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int main(int argc, char **argv)
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