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i386: Update new x86_apicid parsing rules with die_offset support
In new sockets/dies/cores/threads model, the apicid of logical cpu could imply die level info of guest cpu topology thus x86_apicid_from_cpu_idx() need to be refactored with #dies value, so does apicid_*_offset(). To keep semantic compatibility, the legacy pkg_offset which helps to generate CPUIDs such as 0x3 for L3 cache should be mapping to die_offset. Signed-off-by: Like Xu <like.xu@linux.intel.com> Message-Id: <20190612084104.34984-5-like.xu@linux.intel.com> [ehabkost: squash unit test patch] Message-Id: <20190612084104.34984-6-like.xu@linux.intel.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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4 changed files with 124 additions and 76 deletions
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@ -63,88 +63,120 @@ static unsigned apicid_bitwidth_for_count(unsigned count)
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/* Bit width of the SMT_ID (thread ID) field on the APIC ID
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*/
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static inline unsigned apicid_smt_width(unsigned nr_cores, unsigned nr_threads)
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static inline unsigned apicid_smt_width(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads)
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{
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return apicid_bitwidth_for_count(nr_threads);
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}
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/* Bit width of the Core_ID field
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*/
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static inline unsigned apicid_core_width(unsigned nr_cores, unsigned nr_threads)
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static inline unsigned apicid_core_width(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads)
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{
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return apicid_bitwidth_for_count(nr_cores);
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}
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/* Bit width of the Die_ID field */
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static inline unsigned apicid_die_width(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads)
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{
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return apicid_bitwidth_for_count(nr_dies);
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}
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/* Bit offset of the Core_ID field
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*/
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static inline unsigned apicid_core_offset(unsigned nr_cores,
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static inline unsigned apicid_core_offset(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads)
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{
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return apicid_smt_width(nr_cores, nr_threads);
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return apicid_smt_width(nr_dies, nr_cores, nr_threads);
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}
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/* Bit offset of the Die_ID field */
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static inline unsigned apicid_die_offset(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads)
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{
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return apicid_core_offset(nr_dies, nr_cores, nr_threads) +
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apicid_core_width(nr_dies, nr_cores, nr_threads);
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}
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/* Bit offset of the Pkg_ID (socket ID) field
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*/
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static inline unsigned apicid_pkg_offset(unsigned nr_cores, unsigned nr_threads)
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static inline unsigned apicid_pkg_offset(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads)
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{
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return apicid_core_offset(nr_cores, nr_threads) +
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apicid_core_width(nr_cores, nr_threads);
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return apicid_die_offset(nr_dies, nr_cores, nr_threads) +
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apicid_die_width(nr_dies, nr_cores, nr_threads);
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}
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/* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
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*
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* The caller must make sure core_id < nr_cores and smt_id < nr_threads.
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*/
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static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores,
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static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads,
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const X86CPUTopoInfo *topo)
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{
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return (topo->pkg_id << apicid_pkg_offset(nr_cores, nr_threads)) |
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(topo->core_id << apicid_core_offset(nr_cores, nr_threads)) |
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return (topo->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) |
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(topo->die_id << apicid_die_offset(nr_dies, nr_cores, nr_threads)) |
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(topo->core_id << apicid_core_offset(nr_dies, nr_cores, nr_threads)) |
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topo->smt_id;
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}
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/* Calculate thread/core/package IDs for a specific topology,
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* based on (contiguous) CPU index
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*/
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static inline void x86_topo_ids_from_idx(unsigned nr_cores,
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static inline void x86_topo_ids_from_idx(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads,
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unsigned cpu_index,
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X86CPUTopoInfo *topo)
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{
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unsigned core_index = cpu_index / nr_threads;
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topo->pkg_id = cpu_index / (nr_dies * nr_cores * nr_threads);
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topo->die_id = cpu_index / (nr_cores * nr_threads) % nr_dies;
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topo->core_id = cpu_index / nr_threads % nr_cores;
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topo->smt_id = cpu_index % nr_threads;
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topo->core_id = core_index % nr_cores;
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topo->pkg_id = core_index / nr_cores;
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}
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/* Calculate thread/core/package IDs for a specific topology,
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* based on APIC ID
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*/
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static inline void x86_topo_ids_from_apicid(apic_id_t apicid,
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unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads,
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X86CPUTopoInfo *topo)
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{
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topo->smt_id = apicid &
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~(0xFFFFFFFFUL << apicid_smt_width(nr_cores, nr_threads));
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topo->core_id = (apicid >> apicid_core_offset(nr_cores, nr_threads)) &
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~(0xFFFFFFFFUL << apicid_core_width(nr_cores, nr_threads));
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topo->pkg_id = apicid >> apicid_pkg_offset(nr_cores, nr_threads);
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topo->die_id = 0;
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~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threads));
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topo->core_id =
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(apicid >> apicid_core_offset(nr_dies, nr_cores, nr_threads)) &
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~(0xFFFFFFFFUL << apicid_core_width(nr_dies, nr_cores, nr_threads));
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topo->die_id =
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(apicid >> apicid_die_offset(nr_dies, nr_cores, nr_threads)) &
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~(0xFFFFFFFFUL << apicid_die_width(nr_dies, nr_cores, nr_threads));
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topo->pkg_id = apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr_threads);
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}
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/* Make APIC ID for the CPU 'cpu_index'
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*
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* 'cpu_index' is a sequential, contiguous ID for the CPU.
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*/
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static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores,
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static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_dies,
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unsigned nr_cores,
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unsigned nr_threads,
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unsigned cpu_index)
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{
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X86CPUTopoInfo topo;
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x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index, &topo);
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return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
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x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo);
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return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo);
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}
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#endif /* HW_I386_TOPOLOGY_H */
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