motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-25 11:01:52 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/arm: Fetch GICv3 state directly from CPUARMState

Browse source 
This eliminates the need for fetching it from el_change_hook_opaque, and
allows for supporting multiple el_change_hooks without having to hack
something together to find the registered opaque belonging to GICv3.

Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1523997485-1905-6-git-send-email-alindsay@codeaurora.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Aaron Lindsay 2018-04-26 11:04:39 +01:00 • committed by Peter Maydell
parent 7ece99b17e
commit d5a5e4c93d
2 changed files with 2 additions and 18 deletions
Download patch file Download diff file Expand all files Collapse all files

10
hw/intc/arm_gicv3_cpuif.c
View file

@ -29,11 +29,7 @@ void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s)
static GICv3CPUState *icc_cs_from_env(CPUARMState *env) static GICv3CPUState *icc_cs_from_env(CPUARMState *env)
{ {
/* Given the CPU, find the right GICv3CPUState struct. return env->gicv3state;
* Since we registered the CPU interface with the EL change hook as
* the opaque pointer, we can just directly get from the CPU to it.
*/
return arm_get_el_change_hook_opaque(arm_env_get_cpu(env));
} }
static bool gicv3_use_ns_bank(CPUARMState *env) static bool gicv3_use_ns_bank(CPUARMState *env)
@ -2615,9 +2611,7 @@ void gicv3_init_cpuif(GICv3State *s)
* it might be with code translated by CPU 0 but run by CPU 1, in * it might be with code translated by CPU 0 but run by CPU 1, in
* which case we'd get the wrong value. * which case we'd get the wrong value.
* So instead we define the regs with no ri->opaque info, and * So instead we define the regs with no ri->opaque info, and
* get back to the GICv3CPUState from the ARMCPU by reading back * get back to the GICv3CPUState from the CPUARMState.
* the opaque pointer from the el_change_hook, which we're going
* to need to register anyway.
*/ */
define_arm_cp_regs(cpu, gicv3_cpuif_reginfo); define_arm_cp_regs(cpu, gicv3_cpuif_reginfo);
if (arm_feature(&cpu->env, ARM_FEATURE_EL2) if (arm_feature(&cpu->env, ARM_FEATURE_EL2)

10
target/arm/cpu.h
View file

@ -2902,16 +2902,6 @@ static inline AddressSpace *arm_addressspace(CPUState *cs, MemTxAttrs attrs)
void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook, void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
void *opaque); void *opaque);
/**
* arm_get_el_change_hook_opaque:
* Return the opaque data that will be used by the el_change_hook
* for this CPU.
*/
static inline void *arm_get_el_change_hook_opaque(ARMCPU *cpu)
{
return cpu->el_change_hook_opaque;
}
/** /**
* aa32_vfp_dreg: * aa32_vfp_dreg:
* Return a pointer to the Dn register within env in 32-bit mode. * Return a pointer to the Dn register within env in 32-bit mode.