mirror of
https://github.com/Motorhead1991/qemu.git
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target/loongarch: Add floating point arithmetic instruction translation
This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-11-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Song Gao
Richard Henderson
parent
8708a04a61
commit
d578ca6cbb
7 changed files with 611 additions and 0 deletions
403
target/loongarch/fpu_helper.c
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403
target/loongarch/fpu_helper.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* LoongArch float point emulation helpers for QEMU
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "fpu/softfloat.h"
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#include "internals.h"
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#define FLOAT_TO_INT32_OVERFLOW 0x7fffffff
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#define FLOAT_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
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static inline uint64_t nanbox_s(float32 fp)
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{
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return fp | MAKE_64BIT_MASK(32, 32);
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}
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/* Convert loongarch rounding mode in fcsr0 to IEEE library */
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static const FloatRoundMode ieee_rm[4] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down
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};
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void restore_fp_status(CPULoongArchState *env)
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{
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set_float_rounding_mode(ieee_rm[(env->fcsr0 >> FCSR0_RM) & 0x3],
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&env->fp_status);
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set_flush_to_zero(0, &env->fp_status);
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}
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static int ieee_ex_to_loongarch(int xcpt)
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{
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int ret = 0;
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if (xcpt & float_flag_invalid) {
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ret |= FP_INVALID;
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}
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if (xcpt & float_flag_overflow) {
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ret |= FP_OVERFLOW;
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}
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if (xcpt & float_flag_underflow) {
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ret |= FP_UNDERFLOW;
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}
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if (xcpt & float_flag_divbyzero) {
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ret |= FP_DIV0;
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}
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if (xcpt & float_flag_inexact) {
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ret |= FP_INEXACT;
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}
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return ret;
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}
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static void update_fcsr0_mask(CPULoongArchState *env, uintptr_t pc, int mask)
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{
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int flags = get_float_exception_flags(&env->fp_status);
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set_float_exception_flags(0, &env->fp_status);
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flags &= ~mask;
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if (!flags) {
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SET_FP_CAUSE(env->fcsr0, flags);
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return;
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} else {
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flags = ieee_ex_to_loongarch(flags);
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SET_FP_CAUSE(env->fcsr0, flags);
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}
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if (GET_FP_ENABLES(env->fcsr0) & flags) {
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do_raise_exception(env, EXCCODE_FPE, pc);
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} else {
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UPDATE_FP_FLAGS(env->fcsr0, flags);
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}
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}
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static void update_fcsr0(CPULoongArchState *env, uintptr_t pc)
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{
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update_fcsr0_mask(env, pc, 0);
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}
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uint64_t helper_fadd_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_add((uint32_t)fj, (uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fadd_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_add(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fsub_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_sub((uint32_t)fj, (uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fsub_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_sub(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmul_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_mul((uint32_t)fj, (uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmul_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_mul(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fdiv_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_div((uint32_t)fj, (uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fdiv_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_div(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmax_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_maxnum((uint32_t)fj, (uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmax_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_maxnum(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmin_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_minnum((uint32_t)fj, (uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmin_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_minnum(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmaxa_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_maxnummag((uint32_t)fj,
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(uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmaxa_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_maxnummag(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmina_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = nanbox_s(float32_minnummag((uint32_t)fj,
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(uint32_t)fk, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmina_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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fd = float64_minnummag(fj, fk, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fscaleb_s(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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int32_t n = (int32_t)fk;
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fd = nanbox_s(float32_scalbn((uint32_t)fj,
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n > 0x200 ? 0x200 :
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n < -0x200 ? -0x200 : n,
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&env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fscaleb_d(CPULoongArchState *env, uint64_t fj, uint64_t fk)
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{
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uint64_t fd;
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int64_t n = (int64_t)fk;
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fd = float64_scalbn(fj,
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n > 0x1000 ? 0x1000 :
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n < -0x1000 ? -0x1000 : n,
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&env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fsqrt_s(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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fd = nanbox_s(float32_sqrt((uint32_t)fj, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fsqrt_d(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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fd = float64_sqrt(fj, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_frecip_s(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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fd = nanbox_s(float32_div(float32_one, (uint32_t)fj, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_frecip_d(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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fd = float64_div(float64_one, fj, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_frsqrt_s(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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uint32_t fp;
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fp = float32_sqrt((uint32_t)fj, &env->fp_status);
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fd = nanbox_s(float32_div(float32_one, fp, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_frsqrt_d(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fp, fd;
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fp = float64_sqrt(fj, &env->fp_status);
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fd = float64_div(float64_one, fp, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_flogb_s(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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uint32_t fp;
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float_status *status = &env->fp_status;
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FloatRoundMode old_mode = get_float_rounding_mode(status);
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set_float_rounding_mode(float_round_down, status);
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fp = float32_log2((uint32_t)fj, status);
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fd = nanbox_s(float32_round_to_int(fp, status));
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set_float_rounding_mode(old_mode, status);
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update_fcsr0_mask(env, GETPC(), float_flag_inexact);
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return fd;
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}
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uint64_t helper_flogb_d(CPULoongArchState *env, uint64_t fj)
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{
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uint64_t fd;
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float_status *status = &env->fp_status;
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FloatRoundMode old_mode = get_float_rounding_mode(status);
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set_float_rounding_mode(float_round_down, status);
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fd = float64_log2(fj, status);
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fd = float64_round_to_int(fd, status);
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set_float_rounding_mode(old_mode, status);
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update_fcsr0_mask(env, GETPC(), float_flag_inexact);
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return fd;
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}
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uint64_t helper_fclass_s(CPULoongArchState *env, uint64_t fj)
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{
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float32 f = fj;
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bool sign = float32_is_neg(f);
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if (float32_is_infinity(f)) {
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return sign ? 1 << 2 : 1 << 6;
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} else if (float32_is_zero(f)) {
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return sign ? 1 << 5 : 1 << 9;
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} else if (float32_is_zero_or_denormal(f)) {
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return sign ? 1 << 4 : 1 << 8;
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} else if (float32_is_any_nan(f)) {
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float_status s = { }; /* for snan_bit_is_one */
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return float32_is_quiet_nan(f, &s) ? 1 << 1 : 1 << 0;
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} else {
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return sign ? 1 << 3 : 1 << 7;
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}
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}
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uint64_t helper_fclass_d(CPULoongArchState *env, uint64_t fj)
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{
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float64 f = fj;
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bool sign = float64_is_neg(f);
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if (float64_is_infinity(f)) {
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return sign ? 1 << 2 : 1 << 6;
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} else if (float64_is_zero(f)) {
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return sign ? 1 << 5 : 1 << 9;
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} else if (float64_is_zero_or_denormal(f)) {
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return sign ? 1 << 4 : 1 << 8;
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} else if (float64_is_any_nan(f)) {
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float_status s = { }; /* for snan_bit_is_one */
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return float64_is_quiet_nan(f, &s) ? 1 << 1 : 1 << 0;
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} else {
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return sign ? 1 << 3 : 1 << 7;
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}
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}
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uint64_t helper_fmuladd_s(CPULoongArchState *env, uint64_t fj,
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uint64_t fk, uint64_t fa, uint32_t flag)
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{
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uint64_t fd;
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fd = nanbox_s(float32_muladd((uint32_t)fj, (uint32_t)fk,
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(uint32_t)fa, flag, &env->fp_status));
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update_fcsr0(env, GETPC());
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return fd;
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}
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uint64_t helper_fmuladd_d(CPULoongArchState *env, uint64_t fj,
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uint64_t fk, uint64_t fa, uint32_t flag)
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{
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uint64_t fd;
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fd = float64_muladd(fj, fk, fa, flag, &env->fp_status);
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update_fcsr0(env, GETPC());
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return fd;
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}
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