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tests/tcg: add memory-sve test for aarch64

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This will be helpful in debugging problems with tracking SVE memory
accesses via the TCG plugins system.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Robert Henry <robhenry@microsoft.com>
Cc: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-Id: <20230124180127.1881110-26-alex.bennee@linaro.org>
This commit is contained in:
Alex Bennée 2023-01-24 18:01:17 +00:00
parent 0bccdb42df
commit d54c6d3b5d
2 changed files with 9 additions and 1 deletions
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3
tests/tcg/aarch64/system/boot.S
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@ -179,12 +179,13 @@ __start:
isb
/*
* Enable FP registers. The standard C pre-amble will be
* Enable FP/SVE registers. The standard C pre-amble will be
* saving these and A-profile compilers will use AdvSIMD
* registers unless we tell it not to.
*/
mrs x0, cpacr_el1
orr x0, x0, #(3 << 20)
orr x0, x0, #(3 << 16)
msr cpacr_el1, x0
/* Setup some stack space and enter the test code.