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Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
b6e27ab8b1
commit
d537cf6c86
71 changed files with 592 additions and 624 deletions
10
hw/pl080.c
10
hw/pl080.c
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@ -49,8 +49,7 @@ typedef struct {
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int nchannels;
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/* Flag to avoid recursive DMA invocations. */
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int running;
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void *pic;
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int irq;
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qemu_irq irq;
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} pl080_state;
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static const unsigned char pl080_id[] =
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@ -63,9 +62,9 @@ static void pl080_update(pl080_state *s)
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{
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if ((s->tc_int & s->tc_mask)
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|| (s->err_int & s->err_mask))
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pic_set_irq_new(s->pic, s->irq, 1);
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qemu_irq_raise(s->irq);
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else
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pic_set_irq_new(s->pic, s->irq, 1);
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qemu_irq_lower(s->irq);
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}
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static void pl080_run(pl080_state *s)
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@ -325,7 +324,7 @@ static CPUWriteMemoryFunc *pl080_writefn[] = {
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/* The PL080 and PL081 are the same except for the number of channels
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they implement (8 and 2 respectively). */
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void *pl080_init(uint32_t base, void *pic, int irq, int nchannels)
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void *pl080_init(uint32_t base, qemu_irq irq, int nchannels)
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{
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int iomemtype;
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pl080_state *s;
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@ -335,7 +334,6 @@ void *pl080_init(uint32_t base, void *pic, int irq, int nchannels)
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pl080_writefn, s);
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cpu_register_physical_memory(base, 0x00000fff, iomemtype);
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s->base = base;
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s->pic = pic;
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s->irq = irq;
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s->nchannels = nchannels;
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/* ??? Save/restore. */
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