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target/riscv: rvv-1.0: fault-only-first unit stride load

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Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-24-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Frank Chang 2021-12-10 15:56:09 +08:00 • committed by Alistair Francis
parent 83fcd573b1
commit d3e5e2ff4f
4 changed files with 36 additions and 107 deletions
Download patch file Download diff file Expand all files Collapse all files

70
target/riscv/vector_helper.c
View file

@ -186,28 +186,10 @@ static void NAME(CPURISCVState *env, abi_ptr addr, \
*cur = cpu_##LDSUF##_data_ra(env, addr, retaddr); \
} \
GEN_VEXT_LD_ELEM(ldb_b, int8_t, H1, ldsb)
GEN_VEXT_LD_ELEM(ldb_h, int16_t, H2, ldsb)
GEN_VEXT_LD_ELEM(ldb_w, int32_t, H4, ldsb)
GEN_VEXT_LD_ELEM(ldb_d, int64_t, H8, ldsb)
GEN_VEXT_LD_ELEM(ldh_h, int16_t, H2, ldsw)
GEN_VEXT_LD_ELEM(ldh_w, int32_t, H4, ldsw)
GEN_VEXT_LD_ELEM(ldh_d, int64_t, H8, ldsw)
GEN_VEXT_LD_ELEM(ldw_w, int32_t, H4, ldl)
GEN_VEXT_LD_ELEM(ldw_d, int64_t, H8, ldl)
GEN_VEXT_LD_ELEM(lde_b, int8_t, H1, ldsb)
GEN_VEXT_LD_ELEM(lde_h, int16_t, H2, ldsw)
GEN_VEXT_LD_ELEM(lde_w, int32_t, H4, ldl)
GEN_VEXT_LD_ELEM(lde_d, int64_t, H8, ldq)
GEN_VEXT_LD_ELEM(ldbu_b, uint8_t, H1, ldub)
GEN_VEXT_LD_ELEM(ldbu_h, uint16_t, H2, ldub)
GEN_VEXT_LD_ELEM(ldbu_w, uint32_t, H4, ldub)
GEN_VEXT_LD_ELEM(ldbu_d, uint64_t, H8, ldub)
GEN_VEXT_LD_ELEM(ldhu_h, uint16_t, H2, lduw)
GEN_VEXT_LD_ELEM(ldhu_w, uint32_t, H4, lduw)
GEN_VEXT_LD_ELEM(ldhu_d, uint64_t, H8, lduw)
GEN_VEXT_LD_ELEM(ldwu_w, uint32_t, H4, ldl)
GEN_VEXT_LD_ELEM(ldwu_d, uint64_t, H8, ldl)
#define GEN_VEXT_ST_ELEM(NAME, ETYPE, H, STSUF) \
static void NAME(CPURISCVState *env, abi_ptr addr, \
@ -471,7 +453,7 @@ static inline void
vext_ldff(void *vd, void *v0, target_ulong base,
CPURISCVState *env, uint32_t desc,
vext_ldst_elem_fn *ldst_elem,
uint32_t esz, uint32_t msz, uintptr_t ra)
uint32_t esz, uintptr_t ra)
{
void *host;
uint32_t i, k, vl = 0;
@ -485,24 +467,24 @@ vext_ldff(void *vd, void *v0, target_ulong base,
if (!vm && !vext_elem_mask(v0, i)) {
continue;
}
addr = base + nf * i * msz;
addr = base + nf * i * esz;
if (i == 0) {
probe_pages(env, addr, nf * msz, ra, MMU_DATA_LOAD);
probe_pages(env, addr, nf * esz, ra, MMU_DATA_LOAD);
} else {
/* if it triggers an exception, no need to check watchpoint */
remain = nf * msz;
remain = nf * esz;
while (remain > 0) {
offset = -(addr | TARGET_PAGE_MASK);
host = tlb_vaddr_to_host(env, addr, MMU_DATA_LOAD,
cpu_mmu_index(env, false));
if (host) {
#ifdef CONFIG_USER_ONLY
if (page_check_range(addr, nf * msz, PAGE_READ) < 0) {
if (page_check_range(addr, nf * esz, PAGE_READ) < 0) {
vl = i;
goto ProbeSuccess;
}
#else
probe_pages(env, addr, nf * msz, ra, MMU_DATA_LOAD);
probe_pages(env, addr, nf * esz, ra, MMU_DATA_LOAD);
#endif
} else {
vl = i;
@ -527,43 +509,25 @@ ProbeSuccess:
continue;
}
while (k < nf) {
target_ulong addr = base + (i * nf + k) * msz;
target_ulong addr = base + (i * nf + k) * esz;
ldst_elem(env, addr, i + k * vlmax, vd, ra);
k++;
}
}
}
#define GEN_VEXT_LDFF(NAME, MTYPE, ETYPE, LOAD_FN) \
void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
CPURISCVState *env, uint32_t desc) \
{ \
vext_ldff(vd, v0, base, env, desc, LOAD_FN, \
sizeof(ETYPE), sizeof(MTYPE), GETPC()); \
#define GEN_VEXT_LDFF(NAME, ETYPE, LOAD_FN) \
void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
CPURISCVState *env, uint32_t desc) \
{ \
vext_ldff(vd, v0, base, env, desc, LOAD_FN, \
sizeof(ETYPE), GETPC()); \
}
GEN_VEXT_LDFF(vlbff_v_b, int8_t, int8_t, ldb_b)
GEN_VEXT_LDFF(vlbff_v_h, int8_t, int16_t, ldb_h)
GEN_VEXT_LDFF(vlbff_v_w, int8_t, int32_t, ldb_w)
GEN_VEXT_LDFF(vlbff_v_d, int8_t, int64_t, ldb_d)
GEN_VEXT_LDFF(vlhff_v_h, int16_t, int16_t, ldh_h)
GEN_VEXT_LDFF(vlhff_v_w, int16_t, int32_t, ldh_w)
GEN_VEXT_LDFF(vlhff_v_d, int16_t, int64_t, ldh_d)
GEN_VEXT_LDFF(vlwff_v_w, int32_t, int32_t, ldw_w)
GEN_VEXT_LDFF(vlwff_v_d, int32_t, int64_t, ldw_d)
GEN_VEXT_LDFF(vleff_v_b, int8_t, int8_t, lde_b)
GEN_VEXT_LDFF(vleff_v_h, int16_t, int16_t, lde_h)
GEN_VEXT_LDFF(vleff_v_w, int32_t, int32_t, lde_w)
GEN_VEXT_LDFF(vleff_v_d, int64_t, int64_t, lde_d)
GEN_VEXT_LDFF(vlbuff_v_b, uint8_t, uint8_t, ldbu_b)
GEN_VEXT_LDFF(vlbuff_v_h, uint8_t, uint16_t, ldbu_h)
GEN_VEXT_LDFF(vlbuff_v_w, uint8_t, uint32_t, ldbu_w)
GEN_VEXT_LDFF(vlbuff_v_d, uint8_t, uint64_t, ldbu_d)
GEN_VEXT_LDFF(vlhuff_v_h, uint16_t, uint16_t, ldhu_h)
GEN_VEXT_LDFF(vlhuff_v_w, uint16_t, uint32_t, ldhu_w)
GEN_VEXT_LDFF(vlhuff_v_d, uint16_t, uint64_t, ldhu_d)
GEN_VEXT_LDFF(vlwuff_v_w, uint32_t, uint32_t, ldwu_w)
GEN_VEXT_LDFF(vlwuff_v_d, uint32_t, uint64_t, ldwu_d)
GEN_VEXT_LDFF(vle8ff_v, int8_t, lde_b)
GEN_VEXT_LDFF(vle16ff_v, int16_t, lde_h)
GEN_VEXT_LDFF(vle32ff_v, int32_t, lde_w)
GEN_VEXT_LDFF(vle64ff_v, int64_t, lde_d)
#define DO_SWAP(N, M) (M)
#define DO_AND(N, M) (N & M)