motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-06 09:13:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree

Browse source 
Convert the VSHL and VSLI insns from the Neon 2-registers-and-a-shift
group to decodetree.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200522145520.6778-2-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-05-22 15:55:12 +01:00
parent d02ded0870
commit d3c8c736f8
3 changed files with 71 additions and 10 deletions
Download patch file Download diff file Expand all files Collapse all files

18
target/arm/translate.c
View file

@ -5294,6 +5294,14 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
if ((insn & 0x00380080) != 0) {
/* Two registers and shift. */
op = (insn >> 8) & 0xf;
switch (op) {
case 5: /* VSHL, VSLI */
return 1; /* handled by decodetree */
default:
break;
}
if (insn & (1 << 7)) {
/* 64-bit shift. */
if (op > 7) {
@ -5387,16 +5395,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
gen_gvec_sri(size, rd_ofs, rm_ofs, shift,
vec_size, vec_size);
return 0;
case 5: /* VSHL, VSLI */
if (u) { /* VSLI */
gen_gvec_sli(size, rd_ofs, rm_ofs, shift,
vec_size, vec_size);
} else { /* VSHL */
tcg_gen_gvec_shli(size, rd_ofs, rm_ofs, shift,
vec_size, vec_size);
}
return 0;
}
if (size == 3) {