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riscv/opentitan: Update the OpenTitan memory layout

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OpenTitan is currently only avalible on an FPGA platform and the memory
addresses have changed. Update to use the new memory addresses.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 8eb65314830a75d0fea3fccf77bc45b8ddd01c42.1607982831.git.alistair.francis@wdc.com
This commit is contained in:
Alistair Francis 2020-12-14 17:56:54 -08:00
parent 3ed2b8ac2d
commit d31e970a01
2 changed files with 74 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

23
include/hw/riscv/opentitan.h
View file

@ -55,19 +55,30 @@ enum {
IBEX_DEV_UART,
IBEX_DEV_GPIO,
IBEX_DEV_SPI,
IBEX_DEV_FLASH_CTRL,
IBEX_DEV_I2C,
IBEX_DEV_PATTGEN,
IBEX_DEV_RV_TIMER,
IBEX_DEV_AES,
IBEX_DEV_HMAC,
IBEX_DEV_PLIC,
IBEX_DEV_SENSOR_CTRL,
IBEX_DEV_OTP_CTRL,
IBEX_DEV_PWRMGR,
IBEX_DEV_RSTMGR,
IBEX_DEV_CLKMGR,
IBEX_DEV_PINMUX,
IBEX_DEV_PADCTRL,
IBEX_DEV_USBDEV,
IBEX_DEV_FLASH_CTRL,
IBEX_DEV_PLIC,
IBEX_DEV_AES,
IBEX_DEV_HMAC,
IBEX_DEV_KMAC,
IBEX_DEV_KEYMGR,
IBEX_DEV_CSRNG,
IBEX_DEV_ENTROPY,
IBEX_DEV_EDNO,
IBEX_DEV_EDN1,
IBEX_DEV_ALERT_HANDLER,
IBEX_DEV_NMI_GEN,
IBEX_DEV_USBDEV,
IBEX_DEV_PADCTRL,
IBEX_DEV_OTBN,
};
enum {