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https://github.com/Motorhead1991/qemu.git
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unicore32: necessary modifications for other files to support unicore32
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Guan Xuetao
Blue Swirl
parent
8b5d487d4d
commit
d2fbca9422
10 changed files with 202 additions and 14 deletions
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@ -339,6 +339,80 @@ enum
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#endif
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#ifdef TARGET_UNICORE32
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#define ELF_START_MMAP 0x80000000
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#define elf_check_arch(x) ((x) == EM_UNICORE32)
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#define ELF_CLASS ELFCLASS32
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#define ELF_DATA ELFDATA2LSB
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#define ELF_ARCH EM_UNICORE32
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static inline void init_thread(struct target_pt_regs *regs,
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struct image_info *infop)
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{
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abi_long stack = infop->start_stack;
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memset(regs, 0, sizeof(*regs));
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regs->UC32_REG_asr = 0x10;
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regs->UC32_REG_pc = infop->entry & 0xfffffffe;
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regs->UC32_REG_sp = infop->start_stack;
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/* FIXME - what to for failure of get_user()? */
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get_user_ual(regs->UC32_REG_02, stack + 8); /* envp */
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get_user_ual(regs->UC32_REG_01, stack + 4); /* envp */
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/* XXX: it seems that r0 is zeroed after ! */
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regs->UC32_REG_00 = 0;
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}
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#define ELF_NREG 34
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typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
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static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
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{
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(*regs)[0] = env->regs[0];
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(*regs)[1] = env->regs[1];
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(*regs)[2] = env->regs[2];
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(*regs)[3] = env->regs[3];
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(*regs)[4] = env->regs[4];
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(*regs)[5] = env->regs[5];
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(*regs)[6] = env->regs[6];
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(*regs)[7] = env->regs[7];
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(*regs)[8] = env->regs[8];
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(*regs)[9] = env->regs[9];
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(*regs)[10] = env->regs[10];
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(*regs)[11] = env->regs[11];
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(*regs)[12] = env->regs[12];
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(*regs)[13] = env->regs[13];
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(*regs)[14] = env->regs[14];
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(*regs)[15] = env->regs[15];
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(*regs)[16] = env->regs[16];
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(*regs)[17] = env->regs[17];
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(*regs)[18] = env->regs[18];
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(*regs)[19] = env->regs[19];
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(*regs)[20] = env->regs[20];
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(*regs)[21] = env->regs[21];
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(*regs)[22] = env->regs[22];
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(*regs)[23] = env->regs[23];
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(*regs)[24] = env->regs[24];
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(*regs)[25] = env->regs[25];
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(*regs)[26] = env->regs[26];
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(*regs)[27] = env->regs[27];
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(*regs)[28] = env->regs[28];
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(*regs)[29] = env->regs[29];
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(*regs)[30] = env->regs[30];
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(*regs)[31] = env->regs[31];
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(*regs)[32] = cpu_asr_read((CPUState *)env);
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(*regs)[33] = env->regs[0]; /* XXX */
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}
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE 4096
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#define ELF_HWCAP (UC32_HWCAP_CMOV | UC32_HWCAP_UCF64)
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#endif
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#ifdef TARGET_SPARC
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#ifdef TARGET_SPARC64
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@ -816,6 +816,83 @@ void cpu_loop(CPUARMState *env)
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#endif
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#ifdef TARGET_UNICORE32
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void cpu_loop(CPUState *env)
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{
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int trapnr;
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unsigned int n, insn;
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target_siginfo_t info;
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for (;;) {
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cpu_exec_start(env);
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trapnr = uc32_cpu_exec(env);
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cpu_exec_end(env);
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switch (trapnr) {
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case UC32_EXCP_PRIV:
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{
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/* system call */
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get_user_u32(insn, env->regs[31] - 4);
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n = insn & 0xffffff;
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if (n >= UC32_SYSCALL_BASE) {
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/* linux syscall */
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n -= UC32_SYSCALL_BASE;
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if (n == UC32_SYSCALL_NR_set_tls) {
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cpu_set_tls(env, env->regs[0]);
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env->regs[0] = 0;
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} else {
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env->regs[0] = do_syscall(env,
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n,
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env->regs[0],
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env->regs[1],
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env->regs[2],
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env->regs[3],
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env->regs[4],
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env->regs[5]);
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}
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} else {
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goto error;
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}
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}
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break;
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case UC32_EXCP_TRAP:
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info.si_signo = SIGSEGV;
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info.si_errno = 0;
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/* XXX: check env->error_code */
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info.si_code = TARGET_SEGV_MAPERR;
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info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
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queue_signal(env, info.si_signo, &info);
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break;
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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case EXCP_DEBUG:
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{
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int sig;
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sig = gdb_handlesig(env, TARGET_SIGTRAP);
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if (sig) {
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info.si_signo = sig;
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info.si_errno = 0;
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info.si_code = TARGET_TRAP_BRKPT;
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queue_signal(env, info.si_signo, &info);
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}
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}
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break;
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default:
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goto error;
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}
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process_pending_signals(env);
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}
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error:
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fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
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cpu_dump_state(env, stderr, fprintf, 0);
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abort();
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}
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#endif
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#ifdef TARGET_SPARC
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#define SPARC64_STACK_BIAS 2047
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@ -2925,6 +3002,8 @@ int main(int argc, char **argv, char **envp)
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#endif
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#elif defined(TARGET_ARM)
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cpu_model = "any";
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#elif defined(TARGET_UNICORE32)
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cpu_model = "any";
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#elif defined(TARGET_M68K)
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cpu_model = "any";
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#elif defined(TARGET_SPARC)
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@ -3227,6 +3306,14 @@ int main(int argc, char **argv, char **envp)
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env->regs[i] = regs->uregs[i];
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}
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}
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#elif defined(TARGET_UNICORE32)
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{
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int i;
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cpu_asr_write(env, regs->uregs[32], 0xffffffff);
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for (i = 0; i < 32; i++) {
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env->regs[i] = regs->uregs[i];
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}
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}
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#elif defined(TARGET_SPARC)
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{
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int i;
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@ -3367,7 +3454,7 @@ int main(int argc, char **argv, char **envp)
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#error unsupported target CPU
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#endif
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#if defined(TARGET_ARM) || defined(TARGET_M68K)
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#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
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ts->stack_base = info->start_stack;
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ts->heap_base = info->brk;
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/* This will be filled in on the first SYS_HEAPINFO call. */
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@ -105,6 +105,9 @@ typedef struct TaskState {
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FPA11 fpa;
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int swi_errno;
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#endif
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#ifdef TARGET_UNICORE32
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int swi_errno;
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#endif
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#if defined(TARGET_I386) && !defined(TARGET_X86_64)
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abi_ulong target_v86;
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struct vm86_saved_state vm86_saved_regs;
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@ -118,7 +121,7 @@ typedef struct TaskState {
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#ifdef TARGET_M68K
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int sim_syscalls;
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#endif
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#if defined(TARGET_ARM) || defined(TARGET_M68K)
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#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
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/* Extra fields for semihosted binaries. */
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uint32_t stack_base;
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uint32_t heap_base;
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@ -55,7 +55,7 @@
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#endif
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#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) \
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|| defined(TARGET_M68K) || defined(TARGET_CRIS)
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|| defined(TARGET_M68K) || defined(TARGET_CRIS) || defined(TARGET_UNICORE32)
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#define TARGET_IOC_SIZEBITS 14
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#define TARGET_IOC_DIRBITS 2
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@ -315,7 +315,10 @@ struct target_sigaction;
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int do_sigaction(int sig, const struct target_sigaction *act,
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struct target_sigaction *oact);
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#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) || defined(TARGET_M68K) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) \
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|| defined(TARGET_PPC) || defined(TARGET_MIPS) || defined(TARGET_SH4) \
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|| defined(TARGET_M68K) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) \
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|| defined(TARGET_MICROBLAZE) || defined(TARGET_UNICORE32)
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#if defined(TARGET_SPARC)
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#define TARGET_SA_NOCLDSTOP 8u
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@ -1002,7 +1005,8 @@ struct target_winsize {
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#define TARGET_MAP_UNINITIALIZED 0x4000000 /* for anonymous mmap, memory could be uninitialized */
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#endif
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#if (defined(TARGET_I386) && defined(TARGET_ABI32)) || defined(TARGET_ARM) || defined(TARGET_CRIS)
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#if (defined(TARGET_I386) && defined(TARGET_ABI32)) || defined(TARGET_ARM) \
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|| defined(TARGET_CRIS) || defined(TARGET_UNICORE32)
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struct target_stat {
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unsigned short st_dev;
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unsigned short __pad1;
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